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ROM0 now has the spectrum rom

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This commit is contained in:
Adrian Scripca
2022-03-30 13:18:06 +03:00
parent c59b02b186
commit 9d6eb7a9fa
94 changed files with 27700 additions and 9902 deletions
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db/altsyncram_qh91.tdf
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--altsyncram ADDRESS_ACLR_A="NONE" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CLOCK_ENABLE_INPUT_A="BYPASS" CLOCK_ENABLE_OUTPUT_A="BYPASS" CYCLONEII_M4K_COMPATIBILITY="ON" DEVICE_FAMILY="Cyclone IV E" ENABLE_RUNTIME_MOD="NO" INIT_FILE="./rom/gw03.hex" LOW_POWER_MODE="AUTO" NUMWORDS_A=16384 OPERATION_MODE="ROM" OUTDATA_ACLR_A="NONE" OUTDATA_REG_A="CLOCK0" WIDTH_A=8 WIDTH_BYTEENA_A=1 WIDTHAD_A=14 address_a clock0 q_a CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48
--VERSION_BEGIN 13.1 cbx_altsyncram 2013:10:17:09:48:19:SJ cbx_cycloneii 2013:10:17:09:48:19:SJ cbx_lpm_add_sub 2013:10:17:09:48:19:SJ cbx_lpm_compare 2013:10:17:09:48:19:SJ cbx_lpm_decode 2013:10:17:09:48:19:SJ cbx_lpm_mux 2013:10:17:09:48:19:SJ cbx_mgl 2013:10:17:09:48:49:SJ cbx_stratix 2013:10:17:09:48:19:SJ cbx_stratixii 2013:10:17:09:48:19:SJ cbx_stratixiii 2013:10:17:09:48:19:SJ cbx_stratixv 2013:10:17:09:48:19:SJ cbx_util_mgl 2013:10:17:09:48:19:SJ VERSION_END
-- Copyright (C) 1991-2013 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files from any of the foregoing
-- (including device programming or simulation files), and any
-- associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
FUNCTION decode_c8a (data[0..0])
RETURNS ( eq[1..0]);
FUNCTION mux_3nb (data[15..0], sel[0..0])
RETURNS ( result[7..0]);
FUNCTION cycloneive_ram_block (clk0, clk1, clr0, clr1, ena0, ena1, ena2, ena3, portaaddr[PORT_A_ADDRESS_WIDTH-1..0], portaaddrstall, portabyteenamasks[PORT_A_BYTE_ENABLE_MASK_WIDTH-1..0], portadatain[PORT_A_DATA_WIDTH-1..0], portare, portawe, portbaddr[PORT_B_ADDRESS_WIDTH-1..0], portbaddrstall, portbbyteenamasks[PORT_B_BYTE_ENABLE_MASK_WIDTH-1..0], portbdatain[PORT_B_DATA_WIDTH-1..0], portbre, portbwe)
WITH ( CLK0_CORE_CLOCK_ENABLE, CLK0_INPUT_CLOCK_ENABLE, CLK0_OUTPUT_CLOCK_ENABLE, CLK1_CORE_CLOCK_ENABLE, CLK1_INPUT_CLOCK_ENABLE, CLK1_OUTPUT_CLOCK_ENABLE, CONNECTIVITY_CHECKING, DATA_INTERLEAVE_OFFSET_IN_BITS, DATA_INTERLEAVE_WIDTH_IN_BITS, DONT_POWER_OPTIMIZE, INIT_FILE, INIT_FILE_LAYOUT, init_file_restructured, LOGICAL_RAM_NAME, mem_init0, mem_init1, mem_init2, mem_init3, mem_init4, MIXED_PORT_FEED_THROUGH_MODE, OPERATION_MODE, PORT_A_ADDRESS_CLEAR, PORT_A_ADDRESS_WIDTH = 1, PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, PORT_A_BYTE_SIZE, PORT_A_DATA_OUT_CLEAR, PORT_A_DATA_OUT_CLOCK, PORT_A_DATA_WIDTH = 1, PORT_A_FIRST_ADDRESS, PORT_A_FIRST_BIT_NUMBER, PORT_A_LAST_ADDRESS, PORT_A_LOGICAL_RAM_DEPTH, PORT_A_LOGICAL_RAM_WIDTH, PORT_A_READ_DURING_WRITE_MODE, PORT_B_ADDRESS_CLEAR, PORT_B_ADDRESS_CLOCK, PORT_B_ADDRESS_WIDTH = 1, PORT_B_BYTE_ENABLE_CLOCK, PORT_B_BYTE_ENABLE_MASK_WIDTH = 1, PORT_B_BYTE_SIZE, PORT_B_DATA_IN_CLOCK, PORT_B_DATA_OUT_CLEAR, PORT_B_DATA_OUT_CLOCK, PORT_B_DATA_WIDTH = 1, PORT_B_FIRST_ADDRESS, PORT_B_FIRST_BIT_NUMBER, PORT_B_LAST_ADDRESS, PORT_B_LOGICAL_RAM_DEPTH, PORT_B_LOGICAL_RAM_WIDTH, PORT_B_READ_DURING_WRITE_MODE, PORT_B_READ_ENABLE_CLOCK, PORT_B_WRITE_ENABLE_CLOCK, POWER_UP_UNINITIALIZED, RAM_BLOCK_TYPE, SAFE_WRITE, WIDTH_ECCSTATUS)
RETURNS ( portadataout[PORT_A_DATA_WIDTH-1..0], portbdataout[PORT_B_DATA_WIDTH-1..0]);
--synthesis_resources = lut 9 M9K 16 reg 2
OPTIONS ALTERA_INTERNAL_OPTION = "OPTIMIZE_POWER_DURING_SYNTHESIS=NORMAL_COMPILATION";
SUBDESIGN altsyncram_qh91
(
address_a[13..0] : input;
clock0 : input;
q_a[7..0] : output;
)
VARIABLE
address_reg_a[0..0] : dffe;
out_address_reg_a[0..0] : dffe;
rden_decode : decode_c8a;
mux2 : mux_3nb;
ram_block1a0 : cycloneive_ram_block
WITH (
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "none",
CLK0_OUTPUT_CLOCK_ENABLE = "none",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "./rom/gw03.hex",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 13,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 0,
PORT_A_FIRST_BIT_NUMBER = 0,
PORT_A_LAST_ADDRESS = 8191,
PORT_A_LOGICAL_RAM_DEPTH = 16384,
PORT_A_LOGICAL_RAM_WIDTH = 8,
RAM_BLOCK_TYPE = "AUTO"
);
ram_block1a1 : cycloneive_ram_block
WITH (
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "none",
CLK0_OUTPUT_CLOCK_ENABLE = "none",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "./rom/gw03.hex",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 13,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 0,
PORT_A_FIRST_BIT_NUMBER = 1,
PORT_A_LAST_ADDRESS = 8191,
PORT_A_LOGICAL_RAM_DEPTH = 16384,
PORT_A_LOGICAL_RAM_WIDTH = 8,
RAM_BLOCK_TYPE = "AUTO"
);
ram_block1a2 : cycloneive_ram_block
WITH (
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "none",
CLK0_OUTPUT_CLOCK_ENABLE = "none",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "./rom/gw03.hex",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 13,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 0,
PORT_A_FIRST_BIT_NUMBER = 2,
PORT_A_LAST_ADDRESS = 8191,
PORT_A_LOGICAL_RAM_DEPTH = 16384,
PORT_A_LOGICAL_RAM_WIDTH = 8,
RAM_BLOCK_TYPE = "AUTO"
);
ram_block1a3 : cycloneive_ram_block
WITH (
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "none",
CLK0_OUTPUT_CLOCK_ENABLE = "none",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "./rom/gw03.hex",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 13,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 0,
PORT_A_FIRST_BIT_NUMBER = 3,
PORT_A_LAST_ADDRESS = 8191,
PORT_A_LOGICAL_RAM_DEPTH = 16384,
PORT_A_LOGICAL_RAM_WIDTH = 8,
RAM_BLOCK_TYPE = "AUTO"
);
ram_block1a4 : cycloneive_ram_block
WITH (
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "none",
CLK0_OUTPUT_CLOCK_ENABLE = "none",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "./rom/gw03.hex",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 13,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 0,
PORT_A_FIRST_BIT_NUMBER = 4,
PORT_A_LAST_ADDRESS = 8191,
PORT_A_LOGICAL_RAM_DEPTH = 16384,
PORT_A_LOGICAL_RAM_WIDTH = 8,
RAM_BLOCK_TYPE = "AUTO"
);
ram_block1a5 : cycloneive_ram_block
WITH (
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "none",
CLK0_OUTPUT_CLOCK_ENABLE = "none",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "./rom/gw03.hex",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 13,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 0,
PORT_A_FIRST_BIT_NUMBER = 5,
PORT_A_LAST_ADDRESS = 8191,
PORT_A_LOGICAL_RAM_DEPTH = 16384,
PORT_A_LOGICAL_RAM_WIDTH = 8,
RAM_BLOCK_TYPE = "AUTO"
);
ram_block1a6 : cycloneive_ram_block
WITH (
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "none",
CLK0_OUTPUT_CLOCK_ENABLE = "none",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "./rom/gw03.hex",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 13,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 0,
PORT_A_FIRST_BIT_NUMBER = 6,
PORT_A_LAST_ADDRESS = 8191,
PORT_A_LOGICAL_RAM_DEPTH = 16384,
PORT_A_LOGICAL_RAM_WIDTH = 8,
RAM_BLOCK_TYPE = "AUTO"
);
ram_block1a7 : cycloneive_ram_block
WITH (
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "none",
CLK0_OUTPUT_CLOCK_ENABLE = "none",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "./rom/gw03.hex",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 13,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 0,
PORT_A_FIRST_BIT_NUMBER = 7,
PORT_A_LAST_ADDRESS = 8191,
PORT_A_LOGICAL_RAM_DEPTH = 16384,
PORT_A_LOGICAL_RAM_WIDTH = 8,
RAM_BLOCK_TYPE = "AUTO"
);
ram_block1a8 : cycloneive_ram_block
WITH (
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "none",
CLK0_OUTPUT_CLOCK_ENABLE = "none",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "./rom/gw03.hex",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 13,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 8192,
PORT_A_FIRST_BIT_NUMBER = 0,
PORT_A_LAST_ADDRESS = 16383,
PORT_A_LOGICAL_RAM_DEPTH = 16384,
PORT_A_LOGICAL_RAM_WIDTH = 8,
RAM_BLOCK_TYPE = "AUTO"
);
ram_block1a9 : cycloneive_ram_block
WITH (
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "none",
CLK0_OUTPUT_CLOCK_ENABLE = "none",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "./rom/gw03.hex",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 13,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 8192,
PORT_A_FIRST_BIT_NUMBER = 1,
PORT_A_LAST_ADDRESS = 16383,
PORT_A_LOGICAL_RAM_DEPTH = 16384,
PORT_A_LOGICAL_RAM_WIDTH = 8,
RAM_BLOCK_TYPE = "AUTO"
);
ram_block1a10 : cycloneive_ram_block
WITH (
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "none",
CLK0_OUTPUT_CLOCK_ENABLE = "none",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "./rom/gw03.hex",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 13,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 8192,
PORT_A_FIRST_BIT_NUMBER = 2,
PORT_A_LAST_ADDRESS = 16383,
PORT_A_LOGICAL_RAM_DEPTH = 16384,
PORT_A_LOGICAL_RAM_WIDTH = 8,
RAM_BLOCK_TYPE = "AUTO"
);
ram_block1a11 : cycloneive_ram_block
WITH (
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "none",
CLK0_OUTPUT_CLOCK_ENABLE = "none",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "./rom/gw03.hex",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 13,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 8192,
PORT_A_FIRST_BIT_NUMBER = 3,
PORT_A_LAST_ADDRESS = 16383,
PORT_A_LOGICAL_RAM_DEPTH = 16384,
PORT_A_LOGICAL_RAM_WIDTH = 8,
RAM_BLOCK_TYPE = "AUTO"
);
ram_block1a12 : cycloneive_ram_block
WITH (
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "none",
CLK0_OUTPUT_CLOCK_ENABLE = "none",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "./rom/gw03.hex",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 13,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 8192,
PORT_A_FIRST_BIT_NUMBER = 4,
PORT_A_LAST_ADDRESS = 16383,
PORT_A_LOGICAL_RAM_DEPTH = 16384,
PORT_A_LOGICAL_RAM_WIDTH = 8,
RAM_BLOCK_TYPE = "AUTO"
);
ram_block1a13 : cycloneive_ram_block
WITH (
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "none",
CLK0_OUTPUT_CLOCK_ENABLE = "none",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "./rom/gw03.hex",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 13,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 8192,
PORT_A_FIRST_BIT_NUMBER = 5,
PORT_A_LAST_ADDRESS = 16383,
PORT_A_LOGICAL_RAM_DEPTH = 16384,
PORT_A_LOGICAL_RAM_WIDTH = 8,
RAM_BLOCK_TYPE = "AUTO"
);
ram_block1a14 : cycloneive_ram_block
WITH (
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "none",
CLK0_OUTPUT_CLOCK_ENABLE = "none",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "./rom/gw03.hex",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 13,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 8192,
PORT_A_FIRST_BIT_NUMBER = 6,
PORT_A_LAST_ADDRESS = 16383,
PORT_A_LOGICAL_RAM_DEPTH = 16384,
PORT_A_LOGICAL_RAM_WIDTH = 8,
RAM_BLOCK_TYPE = "AUTO"
);
ram_block1a15 : cycloneive_ram_block
WITH (
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "none",
CLK0_OUTPUT_CLOCK_ENABLE = "none",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "./rom/gw03.hex",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 13,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 8192,
PORT_A_FIRST_BIT_NUMBER = 7,
PORT_A_LAST_ADDRESS = 16383,
PORT_A_LOGICAL_RAM_DEPTH = 16384,
PORT_A_LOGICAL_RAM_WIDTH = 8,
RAM_BLOCK_TYPE = "AUTO"
);
address_a_sel[0..0] : WIRE;
address_a_wire[13..0] : WIRE;
rden_decode_addr_sel_a[0..0] : WIRE;
BEGIN
address_reg_a[].clk = clock0;
address_reg_a[].d = address_a_sel[];
out_address_reg_a[].clk = clock0;
out_address_reg_a[].d = address_reg_a[].q;
rden_decode.data[] = rden_decode_addr_sel_a[];
mux2.data[] = ( ram_block1a[15..0].portadataout[0..0]);
mux2.sel[] = out_address_reg_a[].q;
ram_block1a[15..0].clk0 = clock0;
ram_block1a[15..0].ena0 = ( rden_decode.eq[1..1], rden_decode.eq[1..1], rden_decode.eq[1..1], rden_decode.eq[1..1], rden_decode.eq[1..1], rden_decode.eq[1..1], rden_decode.eq[1..1], rden_decode.eq[1..0], rden_decode.eq[0..0], rden_decode.eq[0..0], rden_decode.eq[0..0], rden_decode.eq[0..0], rden_decode.eq[0..0], rden_decode.eq[0..0], rden_decode.eq[0..0]);
ram_block1a[15..0].portaaddr[] = ( address_a_wire[12..0]);
ram_block1a[15..0].portare = B"1111111111111111";
address_a_sel[0..0] = address_a[13..13];
address_a_wire[] = address_a[];
q_a[] = mux2.result[];
rden_decode_addr_sel_a[0..0] = address_a_wire[13..13];
END;
--VALID FILE
db/decode_c8a.tdf
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--lpm_decode CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone IV E" LPM_DECODES=2 LPM_WIDTH=1 data eq
--VERSION_BEGIN 13.1 cbx_cycloneii 2013:10:17:09:48:19:SJ cbx_lpm_add_sub 2013:10:17:09:48:19:SJ cbx_lpm_compare 2013:10:17:09:48:19:SJ cbx_lpm_decode 2013:10:17:09:48:19:SJ cbx_mgl 2013:10:17:09:48:49:SJ cbx_stratix 2013:10:17:09:48:19:SJ cbx_stratixii 2013:10:17:09:48:19:SJ VERSION_END
-- Copyright (C) 1991-2013 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files from any of the foregoing
-- (including device programming or simulation files), and any
-- associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
--synthesis_resources = lut 1
SUBDESIGN decode_c8a
(
data[0..0] : input;
eq[1..0] : output;
)
VARIABLE
enable : NODE;
eq_node[1..0] : WIRE;
BEGIN
enable = VCC;
eq[] = eq_node[];
eq_node[] = ( (data[] & enable), ((! data[]) & enable));
END;
--VALID FILE
db/logic_util_heursitic.dat
BIN
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db/mux_3nb.tdf
+53
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--lpm_mux CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone IV E" LPM_SIZE=2 LPM_WIDTH=8 LPM_WIDTHS=1 data result sel
--VERSION_BEGIN 13.1 cbx_lpm_mux 2013:10:17:09:48:19:SJ cbx_mgl 2013:10:17:09:48:49:SJ VERSION_END
-- Copyright (C) 1991-2013 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files from any of the foregoing
-- (including device programming or simulation files), and any
-- associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
--synthesis_resources = lut 8
SUBDESIGN mux_3nb
(
data[15..0] : input;
result[7..0] : output;
sel[0..0] : input;
)
VARIABLE
result_node[7..0] : WIRE;
sel_node[0..0] : WIRE;
w_data109w[1..0] : WIRE;
w_data121w[1..0] : WIRE;
w_data133w[1..0] : WIRE;
w_data145w[1..0] : WIRE;
w_data157w[1..0] : WIRE;
w_data169w[1..0] : WIRE;
w_data83w[1..0] : WIRE;
w_data97w[1..0] : WIRE;
BEGIN
result[] = result_node[];
result_node[] = ( ((sel_node[] & w_data169w[1..1]) # ((! sel_node[]) & w_data169w[0..0])), ((sel_node[] & w_data157w[1..1]) # ((! sel_node[]) & w_data157w[0..0])), ((sel_node[] & w_data145w[1..1]) # ((! sel_node[]) & w_data145w[0..0])), ((sel_node[] & w_data133w[1..1]) # ((! sel_node[]) & w_data133w[0..0])), ((sel_node[] & w_data121w[1..1]) # ((! sel_node[]) & w_data121w[0..0])), ((sel_node[] & w_data109w[1..1]) # ((! sel_node[]) & w_data109w[0..0])), ((sel_node[] & w_data97w[1..1]) # ((! sel_node[]) & w_data97w[0..0])), ((sel_node[] & w_data83w[1..1]) # ((! sel_node[]) & w_data83w[0..0])));
sel_node[] = ( sel[0..0]);
w_data109w[] = ( data[10..10], data[2..2]);
w_data121w[] = ( data[11..11], data[3..3]);
w_data133w[] = ( data[12..12], data[4..4]);
w_data145w[] = ( data[13..13], data[5..5]);
w_data157w[] = ( data[14..14], data[6..6]);
w_data169w[] = ( data[15..15], data[7..7]);
w_data83w[] = ( data[8..8], data[0..0]);
w_data97w[] = ( data[9..9], data[1..1]);
END;
--VALID FILE
db/prev_cmp_spectrum.qmsg
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db/spectrum.asm.qmsg
+6 -6
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{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1648633116429 ""} { "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1648635142046 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II 32-bit " "Running Quartus II 32-bit Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition " "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1648633116430 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed Mar 30 12:38:36 2022 " "Processing started: Wed Mar 30 12:38:36 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1648633116430 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1648633116430 ""} { "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II 32-bit " "Running Quartus II 32-bit Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition " "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1648635142047 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed Mar 30 13:12:21 2022 " "Processing started: Wed Mar 30 13:12:21 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1648635142047 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1648635142047 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off spectrum -c spectrum " "Command: quartus_asm --read_settings_files=off --write_settings_files=off spectrum -c spectrum" { } { } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1648633116430 ""} { "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off spectrum -c spectrum " "Command: quartus_asm --read_settings_files=off --write_settings_files=off spectrum -c spectrum" { } { } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1648635142047 ""}
{ "Info" "IASM_ASM_GENERATING_POWER_DATA" "" "Writing out detailed assembly data for power analysis" { } { } 0 115031 "Writing out detailed assembly data for power analysis" 0 0 "Assembler" 0 -1 1648633117331 ""} { "Info" "IASM_ASM_GENERATING_POWER_DATA" "" "Writing out detailed assembly data for power analysis" { } { } 0 115031 "Writing out detailed assembly data for power analysis" 0 0 "Assembler" 0 -1 1648635143022 ""}
{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" { } { } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1648633117357 ""} { "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" { } { } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1648635143049 ""}
{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus II 32-bit " "Quartus II 32-bit Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "393 " "Peak virtual memory: 393 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1648633117592 ""} { "Info" "IQEXE_END_BANNER_TIME" "Wed Mar 30 12:38:37 2022 " "Processing ended: Wed Mar 30 12:38:37 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1648633117592 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1648633117592 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1648633117592 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1648633117592 ""} { "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus II 32-bit " "Quartus II 32-bit Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "385 " "Peak virtual memory: 385 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1648635143323 ""} { "Info" "IQEXE_END_BANNER_TIME" "Wed Mar 30 13:12:23 2022 " "Processing ended: Wed Mar 30 13:12:23 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1648635143323 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Elapsed time: 00:00:02" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1648635143323 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1648635143323 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1648635143323 ""}
db/spectrum.asm.rdb
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db/spectrum.cbx.xml
+1 -1
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@@ -1,6 +1,6 @@
<?xml version="1.0" ?> <?xml version="1.0" ?>
<LOG_ROOT> <LOG_ROOT>
<PROJECT NAME="spectrum"> <PROJECT NAME="spectrum">
<CBX_INST_ENTRY INSTANCE_NAME="|spectrum|rom0:rom|altsyncram:altsyncram_component" CBX_FILE_NAME="altsyncram_ro91.tdf"/> <CBX_INST_ENTRY INSTANCE_NAME="|spectrum|rom0:rom|altsyncram:altsyncram_component" CBX_FILE_NAME="altsyncram_qh91.tdf"/>
</PROJECT> </PROJECT>
</LOG_ROOT> </LOG_ROOT>
db/spectrum.cmp.bpm
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db/spectrum.cycloneive_io_sim_cache.45um_tt_1200mv_85c_slow.hsd
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db/spectrum.eda.qmsg
+12 -12
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@@ -1,12 +1,12 @@
{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1648633122029 ""} { "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1648635147928 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "EDA Netlist Writer Quartus II 32-bit " "Running Quartus II 32-bit EDA Netlist Writer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition " "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1648633122030 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed Mar 30 12:38:41 2022 " "Processing started: Wed Mar 30 12:38:41 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1648633122030 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1648633122030 ""} { "Info" "IQEXE_START_BANNER_PRODUCT" "EDA Netlist Writer Quartus II 32-bit " "Running Quartus II 32-bit EDA Netlist Writer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition " "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1648635147929 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed Mar 30 13:12:27 2022 " "Processing started: Wed Mar 30 13:12:27 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1648635147929 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1648635147929 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_eda --read_settings_files=off --write_settings_files=off spectrum -c spectrum " "Command: quartus_eda --read_settings_files=off --write_settings_files=off spectrum -c spectrum" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1648633122031 ""} { "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_eda --read_settings_files=off --write_settings_files=off spectrum -c spectrum " "Command: quartus_eda --read_settings_files=off --write_settings_files=off spectrum -c spectrum" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1648635147929 ""}
{ "Info" "IWSC_DONE_HDL_GENERATION" "spectrum_6_1200mv_85c_slow.vo /home/benny/work/fpga/projects/simulation/modelsim/ simulation " "Generated file spectrum_6_1200mv_85c_slow.vo in folder \"/home/benny/work/fpga/projects/simulation/modelsim/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1648633122334 ""} { "Info" "IWSC_DONE_HDL_GENERATION" "spectrum_6_1200mv_85c_slow.vo /home/benny/work/fpga/projects/simulation/modelsim/ simulation " "Generated file spectrum_6_1200mv_85c_slow.vo in folder \"/home/benny/work/fpga/projects/simulation/modelsim/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1648635148267 ""}
{ "Info" "IWSC_DONE_HDL_GENERATION" "spectrum_6_1200mv_0c_slow.vo /home/benny/work/fpga/projects/simulation/modelsim/ simulation " "Generated file spectrum_6_1200mv_0c_slow.vo in folder \"/home/benny/work/fpga/projects/simulation/modelsim/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1648633122355 ""} { "Info" "IWSC_DONE_HDL_GENERATION" "spectrum_6_1200mv_0c_slow.vo /home/benny/work/fpga/projects/simulation/modelsim/ simulation " "Generated file spectrum_6_1200mv_0c_slow.vo in folder \"/home/benny/work/fpga/projects/simulation/modelsim/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1648635148299 ""}
{ "Info" "IWSC_DONE_HDL_GENERATION" "spectrum_min_1200mv_0c_fast.vo /home/benny/work/fpga/projects/simulation/modelsim/ simulation " "Generated file spectrum_min_1200mv_0c_fast.vo in folder \"/home/benny/work/fpga/projects/simulation/modelsim/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1648633122376 ""} { "Info" "IWSC_DONE_HDL_GENERATION" "spectrum_min_1200mv_0c_fast.vo /home/benny/work/fpga/projects/simulation/modelsim/ simulation " "Generated file spectrum_min_1200mv_0c_fast.vo in folder \"/home/benny/work/fpga/projects/simulation/modelsim/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1648635148332 ""}
{ "Info" "IWSC_DONE_HDL_GENERATION" "spectrum.vo /home/benny/work/fpga/projects/simulation/modelsim/ simulation " "Generated file spectrum.vo in folder \"/home/benny/work/fpga/projects/simulation/modelsim/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1648633122396 ""} { "Info" "IWSC_DONE_HDL_GENERATION" "spectrum.vo /home/benny/work/fpga/projects/simulation/modelsim/ simulation " "Generated file spectrum.vo in folder \"/home/benny/work/fpga/projects/simulation/modelsim/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1648635148365 ""}
{ "Info" "IWSC_DONE_HDL_GENERATION" "spectrum_6_1200mv_85c_v_slow.sdo /home/benny/work/fpga/projects/simulation/modelsim/ simulation " "Generated file spectrum_6_1200mv_85c_v_slow.sdo in folder \"/home/benny/work/fpga/projects/simulation/modelsim/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1648633122418 ""} { "Info" "IWSC_DONE_HDL_GENERATION" "spectrum_6_1200mv_85c_v_slow.sdo /home/benny/work/fpga/projects/simulation/modelsim/ simulation " "Generated file spectrum_6_1200mv_85c_v_slow.sdo in folder \"/home/benny/work/fpga/projects/simulation/modelsim/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1648635148393 ""}
{ "Info" "IWSC_DONE_HDL_GENERATION" "spectrum_6_1200mv_0c_v_slow.sdo /home/benny/work/fpga/projects/simulation/modelsim/ simulation " "Generated file spectrum_6_1200mv_0c_v_slow.sdo in folder \"/home/benny/work/fpga/projects/simulation/modelsim/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1648633122437 ""} { "Info" "IWSC_DONE_HDL_GENERATION" "spectrum_6_1200mv_0c_v_slow.sdo /home/benny/work/fpga/projects/simulation/modelsim/ simulation " "Generated file spectrum_6_1200mv_0c_v_slow.sdo in folder \"/home/benny/work/fpga/projects/simulation/modelsim/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1648635148420 ""}
{ "Info" "IWSC_DONE_HDL_GENERATION" "spectrum_min_1200mv_0c_v_fast.sdo /home/benny/work/fpga/projects/simulation/modelsim/ simulation " "Generated file spectrum_min_1200mv_0c_v_fast.sdo in folder \"/home/benny/work/fpga/projects/simulation/modelsim/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1648633122456 ""} { "Info" "IWSC_DONE_HDL_GENERATION" "spectrum_min_1200mv_0c_v_fast.sdo /home/benny/work/fpga/projects/simulation/modelsim/ simulation " "Generated file spectrum_min_1200mv_0c_v_fast.sdo in folder \"/home/benny/work/fpga/projects/simulation/modelsim/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1648635148446 ""}
{ "Info" "IWSC_DONE_HDL_GENERATION" "spectrum_v.sdo /home/benny/work/fpga/projects/simulation/modelsim/ simulation " "Generated file spectrum_v.sdo in folder \"/home/benny/work/fpga/projects/simulation/modelsim/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1648633122475 ""} { "Info" "IWSC_DONE_HDL_GENERATION" "spectrum_v.sdo /home/benny/work/fpga/projects/simulation/modelsim/ simulation " "Generated file spectrum_v.sdo in folder \"/home/benny/work/fpga/projects/simulation/modelsim/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1648635148473 ""}
{ "Info" "IQEXE_ERROR_COUNT" "EDA Netlist Writer 0 s 0 s Quartus II 32-bit " "Quartus II 32-bit EDA Netlist Writer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "344 " "Peak virtual memory: 344 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1648633122507 ""} { "Info" "IQEXE_END_BANNER_TIME" "Wed Mar 30 12:38:42 2022 " "Processing ended: Wed Mar 30 12:38:42 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1648633122507 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1648633122507 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1648633122507 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1648633122507 ""} { "Info" "IQEXE_ERROR_COUNT" "EDA Netlist Writer 0 s 0 s Quartus II 32-bit " "Quartus II 32-bit EDA Netlist Writer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "343 " "Peak virtual memory: 343 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1648635148515 ""} { "Info" "IQEXE_END_BANNER_TIME" "Wed Mar 30 13:12:28 2022 " "Processing ended: Wed Mar 30 13:12:28 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1648635148515 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1648635148515 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1648635148515 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1648635148515 ""}
db/spectrum.fit.qmsg
+48 -48
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File diff suppressed because one or more lines are too long
db/spectrum.hier_info
+289 -21
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@@ -14,6 +14,17 @@ LED[7] <= rom0:rom.q
address[0] => address[0].IN1 address[0] => address[0].IN1
address[1] => address[1].IN1 address[1] => address[1].IN1
address[2] => address[2].IN1 address[2] => address[2].IN1
address[3] => address[3].IN1
address[4] => address[4].IN1
address[5] => address[5].IN1
address[6] => address[6].IN1
address[7] => address[7].IN1
address[8] => address[8].IN1
address[9] => address[9].IN1
address[10] => address[10].IN1
address[11] => address[11].IN1
address[12] => address[12].IN1
address[13] => address[13].IN1
clock => clock.IN1 clock => clock.IN1
q[0] <= altsyncram:altsyncram_component.q_a q[0] <= altsyncram:altsyncram_component.q_a
q[1] <= altsyncram:altsyncram_component.q_a q[1] <= altsyncram:altsyncram_component.q_a
@@ -39,13 +50,24 @@ data_a[5] => ~NO_FANOUT~
data_a[6] => ~NO_FANOUT~ data_a[6] => ~NO_FANOUT~
data_a[7] => ~NO_FANOUT~ data_a[7] => ~NO_FANOUT~
data_b[0] => ~NO_FANOUT~ data_b[0] => ~NO_FANOUT~
address_a[0] => altsyncram_ro91:auto_generated.address_a[0] address_a[0] => altsyncram_qh91:auto_generated.address_a[0]
address_a[1] => altsyncram_ro91:auto_generated.address_a[1] address_a[1] => altsyncram_qh91:auto_generated.address_a[1]
address_a[2] => altsyncram_ro91:auto_generated.address_a[2] address_a[2] => altsyncram_qh91:auto_generated.address_a[2]
address_a[3] => altsyncram_qh91:auto_generated.address_a[3]
address_a[4] => altsyncram_qh91:auto_generated.address_a[4]
address_a[5] => altsyncram_qh91:auto_generated.address_a[5]
address_a[6] => altsyncram_qh91:auto_generated.address_a[6]
address_a[7] => altsyncram_qh91:auto_generated.address_a[7]
address_a[8] => altsyncram_qh91:auto_generated.address_a[8]
address_a[9] => altsyncram_qh91:auto_generated.address_a[9]
address_a[10] => altsyncram_qh91:auto_generated.address_a[10]
address_a[11] => altsyncram_qh91:auto_generated.address_a[11]
address_a[12] => altsyncram_qh91:auto_generated.address_a[12]
address_a[13] => altsyncram_qh91:auto_generated.address_a[13]
address_b[0] => ~NO_FANOUT~ address_b[0] => ~NO_FANOUT~
addressstall_a => ~NO_FANOUT~ addressstall_a => ~NO_FANOUT~
addressstall_b => ~NO_FANOUT~ addressstall_b => ~NO_FANOUT~
clock0 => altsyncram_ro91:auto_generated.clock0 clock0 => altsyncram_qh91:auto_generated.clock0
clock1 => ~NO_FANOUT~ clock1 => ~NO_FANOUT~
clocken0 => ~NO_FANOUT~ clocken0 => ~NO_FANOUT~
clocken1 => ~NO_FANOUT~ clocken1 => ~NO_FANOUT~
@@ -55,21 +77,21 @@ aclr0 => ~NO_FANOUT~
aclr1 => ~NO_FANOUT~ aclr1 => ~NO_FANOUT~
byteena_a[0] => ~NO_FANOUT~ byteena_a[0] => ~NO_FANOUT~
byteena_b[0] => ~NO_FANOUT~ byteena_b[0] => ~NO_FANOUT~
q_a[0] <= altsyncram_ro91:auto_generated.q_a[0] q_a[0] <= altsyncram_qh91:auto_generated.q_a[0]
q_a[1] <= altsyncram_ro91:auto_generated.q_a[1] q_a[1] <= altsyncram_qh91:auto_generated.q_a[1]
q_a[2] <= altsyncram_ro91:auto_generated.q_a[2] q_a[2] <= altsyncram_qh91:auto_generated.q_a[2]
q_a[3] <= altsyncram_ro91:auto_generated.q_a[3] q_a[3] <= altsyncram_qh91:auto_generated.q_a[3]
q_a[4] <= altsyncram_ro91:auto_generated.q_a[4] q_a[4] <= altsyncram_qh91:auto_generated.q_a[4]
q_a[5] <= altsyncram_ro91:auto_generated.q_a[5] q_a[5] <= altsyncram_qh91:auto_generated.q_a[5]
q_a[6] <= altsyncram_ro91:auto_generated.q_a[6] q_a[6] <= altsyncram_qh91:auto_generated.q_a[6]
q_a[7] <= altsyncram_ro91:auto_generated.q_a[7] q_a[7] <= altsyncram_qh91:auto_generated.q_a[7]
q_b[0] <= <GND> q_b[0] <= <GND>
eccstatus[0] <= <GND> eccstatus[0] <= <GND>
eccstatus[1] <= <GND> eccstatus[1] <= <GND>
eccstatus[2] <= <GND> eccstatus[2] <= <GND>
|spectrum|rom0:rom|altsyncram:altsyncram_component|altsyncram_ro91:auto_generated |spectrum|rom0:rom|altsyncram:altsyncram_component|altsyncram_qh91:auto_generated
address_a[0] => ram_block1a0.PORTAADDR address_a[0] => ram_block1a0.PORTAADDR
address_a[0] => ram_block1a1.PORTAADDR address_a[0] => ram_block1a1.PORTAADDR
address_a[0] => ram_block1a2.PORTAADDR address_a[0] => ram_block1a2.PORTAADDR
@@ -78,6 +100,14 @@ address_a[0] => ram_block1a4.PORTAADDR
address_a[0] => ram_block1a5.PORTAADDR address_a[0] => ram_block1a5.PORTAADDR
address_a[0] => ram_block1a6.PORTAADDR address_a[0] => ram_block1a6.PORTAADDR
address_a[0] => ram_block1a7.PORTAADDR address_a[0] => ram_block1a7.PORTAADDR
address_a[0] => ram_block1a8.PORTAADDR
address_a[0] => ram_block1a9.PORTAADDR
address_a[0] => ram_block1a10.PORTAADDR
address_a[0] => ram_block1a11.PORTAADDR
address_a[0] => ram_block1a12.PORTAADDR
address_a[0] => ram_block1a13.PORTAADDR
address_a[0] => ram_block1a14.PORTAADDR
address_a[0] => ram_block1a15.PORTAADDR
address_a[1] => ram_block1a0.PORTAADDR1 address_a[1] => ram_block1a0.PORTAADDR1
address_a[1] => ram_block1a1.PORTAADDR1 address_a[1] => ram_block1a1.PORTAADDR1
address_a[1] => ram_block1a2.PORTAADDR1 address_a[1] => ram_block1a2.PORTAADDR1
@@ -86,6 +116,14 @@ address_a[1] => ram_block1a4.PORTAADDR1
address_a[1] => ram_block1a5.PORTAADDR1 address_a[1] => ram_block1a5.PORTAADDR1
address_a[1] => ram_block1a6.PORTAADDR1 address_a[1] => ram_block1a6.PORTAADDR1
address_a[1] => ram_block1a7.PORTAADDR1 address_a[1] => ram_block1a7.PORTAADDR1
address_a[1] => ram_block1a8.PORTAADDR1
address_a[1] => ram_block1a9.PORTAADDR1
address_a[1] => ram_block1a10.PORTAADDR1
address_a[1] => ram_block1a11.PORTAADDR1
address_a[1] => ram_block1a12.PORTAADDR1
address_a[1] => ram_block1a13.PORTAADDR1
address_a[1] => ram_block1a14.PORTAADDR1
address_a[1] => ram_block1a15.PORTAADDR1
address_a[2] => ram_block1a0.PORTAADDR2 address_a[2] => ram_block1a0.PORTAADDR2
address_a[2] => ram_block1a1.PORTAADDR2 address_a[2] => ram_block1a1.PORTAADDR2
address_a[2] => ram_block1a2.PORTAADDR2 address_a[2] => ram_block1a2.PORTAADDR2
@@ -94,6 +132,176 @@ address_a[2] => ram_block1a4.PORTAADDR2
address_a[2] => ram_block1a5.PORTAADDR2 address_a[2] => ram_block1a5.PORTAADDR2
address_a[2] => ram_block1a6.PORTAADDR2 address_a[2] => ram_block1a6.PORTAADDR2
address_a[2] => ram_block1a7.PORTAADDR2 address_a[2] => ram_block1a7.PORTAADDR2
address_a[2] => ram_block1a8.PORTAADDR2
address_a[2] => ram_block1a9.PORTAADDR2
address_a[2] => ram_block1a10.PORTAADDR2
address_a[2] => ram_block1a11.PORTAADDR2
address_a[2] => ram_block1a12.PORTAADDR2
address_a[2] => ram_block1a13.PORTAADDR2
address_a[2] => ram_block1a14.PORTAADDR2
address_a[2] => ram_block1a15.PORTAADDR2
address_a[3] => ram_block1a0.PORTAADDR3
address_a[3] => ram_block1a1.PORTAADDR3
address_a[3] => ram_block1a2.PORTAADDR3
address_a[3] => ram_block1a3.PORTAADDR3
address_a[3] => ram_block1a4.PORTAADDR3
address_a[3] => ram_block1a5.PORTAADDR3
address_a[3] => ram_block1a6.PORTAADDR3
address_a[3] => ram_block1a7.PORTAADDR3
address_a[3] => ram_block1a8.PORTAADDR3
address_a[3] => ram_block1a9.PORTAADDR3
address_a[3] => ram_block1a10.PORTAADDR3
address_a[3] => ram_block1a11.PORTAADDR3
address_a[3] => ram_block1a12.PORTAADDR3
address_a[3] => ram_block1a13.PORTAADDR3
address_a[3] => ram_block1a14.PORTAADDR3
address_a[3] => ram_block1a15.PORTAADDR3
address_a[4] => ram_block1a0.PORTAADDR4
address_a[4] => ram_block1a1.PORTAADDR4
address_a[4] => ram_block1a2.PORTAADDR4
address_a[4] => ram_block1a3.PORTAADDR4
address_a[4] => ram_block1a4.PORTAADDR4
address_a[4] => ram_block1a5.PORTAADDR4
address_a[4] => ram_block1a6.PORTAADDR4
address_a[4] => ram_block1a7.PORTAADDR4
address_a[4] => ram_block1a8.PORTAADDR4
address_a[4] => ram_block1a9.PORTAADDR4
address_a[4] => ram_block1a10.PORTAADDR4
address_a[4] => ram_block1a11.PORTAADDR4
address_a[4] => ram_block1a12.PORTAADDR4
address_a[4] => ram_block1a13.PORTAADDR4
address_a[4] => ram_block1a14.PORTAADDR4
address_a[4] => ram_block1a15.PORTAADDR4
address_a[5] => ram_block1a0.PORTAADDR5
address_a[5] => ram_block1a1.PORTAADDR5
address_a[5] => ram_block1a2.PORTAADDR5
address_a[5] => ram_block1a3.PORTAADDR5
address_a[5] => ram_block1a4.PORTAADDR5
address_a[5] => ram_block1a5.PORTAADDR5
address_a[5] => ram_block1a6.PORTAADDR5
address_a[5] => ram_block1a7.PORTAADDR5
address_a[5] => ram_block1a8.PORTAADDR5
address_a[5] => ram_block1a9.PORTAADDR5
address_a[5] => ram_block1a10.PORTAADDR5
address_a[5] => ram_block1a11.PORTAADDR5
address_a[5] => ram_block1a12.PORTAADDR5
address_a[5] => ram_block1a13.PORTAADDR5
address_a[5] => ram_block1a14.PORTAADDR5
address_a[5] => ram_block1a15.PORTAADDR5
address_a[6] => ram_block1a0.PORTAADDR6
address_a[6] => ram_block1a1.PORTAADDR6
address_a[6] => ram_block1a2.PORTAADDR6
address_a[6] => ram_block1a3.PORTAADDR6
address_a[6] => ram_block1a4.PORTAADDR6
address_a[6] => ram_block1a5.PORTAADDR6
address_a[6] => ram_block1a6.PORTAADDR6
address_a[6] => ram_block1a7.PORTAADDR6
address_a[6] => ram_block1a8.PORTAADDR6
address_a[6] => ram_block1a9.PORTAADDR6
address_a[6] => ram_block1a10.PORTAADDR6
address_a[6] => ram_block1a11.PORTAADDR6
address_a[6] => ram_block1a12.PORTAADDR6
address_a[6] => ram_block1a13.PORTAADDR6
address_a[6] => ram_block1a14.PORTAADDR6
address_a[6] => ram_block1a15.PORTAADDR6
address_a[7] => ram_block1a0.PORTAADDR7
address_a[7] => ram_block1a1.PORTAADDR7
address_a[7] => ram_block1a2.PORTAADDR7
address_a[7] => ram_block1a3.PORTAADDR7
address_a[7] => ram_block1a4.PORTAADDR7
address_a[7] => ram_block1a5.PORTAADDR7
address_a[7] => ram_block1a6.PORTAADDR7
address_a[7] => ram_block1a7.PORTAADDR7
address_a[7] => ram_block1a8.PORTAADDR7
address_a[7] => ram_block1a9.PORTAADDR7
address_a[7] => ram_block1a10.PORTAADDR7
address_a[7] => ram_block1a11.PORTAADDR7
address_a[7] => ram_block1a12.PORTAADDR7
address_a[7] => ram_block1a13.PORTAADDR7
address_a[7] => ram_block1a14.PORTAADDR7
address_a[7] => ram_block1a15.PORTAADDR7
address_a[8] => ram_block1a0.PORTAADDR8
address_a[8] => ram_block1a1.PORTAADDR8
address_a[8] => ram_block1a2.PORTAADDR8
address_a[8] => ram_block1a3.PORTAADDR8
address_a[8] => ram_block1a4.PORTAADDR8
address_a[8] => ram_block1a5.PORTAADDR8
address_a[8] => ram_block1a6.PORTAADDR8
address_a[8] => ram_block1a7.PORTAADDR8
address_a[8] => ram_block1a8.PORTAADDR8
address_a[8] => ram_block1a9.PORTAADDR8
address_a[8] => ram_block1a10.PORTAADDR8
address_a[8] => ram_block1a11.PORTAADDR8
address_a[8] => ram_block1a12.PORTAADDR8
address_a[8] => ram_block1a13.PORTAADDR8
address_a[8] => ram_block1a14.PORTAADDR8
address_a[8] => ram_block1a15.PORTAADDR8
address_a[9] => ram_block1a0.PORTAADDR9
address_a[9] => ram_block1a1.PORTAADDR9
address_a[9] => ram_block1a2.PORTAADDR9
address_a[9] => ram_block1a3.PORTAADDR9
address_a[9] => ram_block1a4.PORTAADDR9
address_a[9] => ram_block1a5.PORTAADDR9
address_a[9] => ram_block1a6.PORTAADDR9
address_a[9] => ram_block1a7.PORTAADDR9
address_a[9] => ram_block1a8.PORTAADDR9
address_a[9] => ram_block1a9.PORTAADDR9
address_a[9] => ram_block1a10.PORTAADDR9
address_a[9] => ram_block1a11.PORTAADDR9
address_a[9] => ram_block1a12.PORTAADDR9
address_a[9] => ram_block1a13.PORTAADDR9
address_a[9] => ram_block1a14.PORTAADDR9
address_a[9] => ram_block1a15.PORTAADDR9
address_a[10] => ram_block1a0.PORTAADDR10
address_a[10] => ram_block1a1.PORTAADDR10
address_a[10] => ram_block1a2.PORTAADDR10
address_a[10] => ram_block1a3.PORTAADDR10
address_a[10] => ram_block1a4.PORTAADDR10
address_a[10] => ram_block1a5.PORTAADDR10
address_a[10] => ram_block1a6.PORTAADDR10
address_a[10] => ram_block1a7.PORTAADDR10
address_a[10] => ram_block1a8.PORTAADDR10
address_a[10] => ram_block1a9.PORTAADDR10
address_a[10] => ram_block1a10.PORTAADDR10
address_a[10] => ram_block1a11.PORTAADDR10
address_a[10] => ram_block1a12.PORTAADDR10
address_a[10] => ram_block1a13.PORTAADDR10
address_a[10] => ram_block1a14.PORTAADDR10
address_a[10] => ram_block1a15.PORTAADDR10
address_a[11] => ram_block1a0.PORTAADDR11
address_a[11] => ram_block1a1.PORTAADDR11
address_a[11] => ram_block1a2.PORTAADDR11
address_a[11] => ram_block1a3.PORTAADDR11
address_a[11] => ram_block1a4.PORTAADDR11
address_a[11] => ram_block1a5.PORTAADDR11
address_a[11] => ram_block1a6.PORTAADDR11
address_a[11] => ram_block1a7.PORTAADDR11
address_a[11] => ram_block1a8.PORTAADDR11
address_a[11] => ram_block1a9.PORTAADDR11
address_a[11] => ram_block1a10.PORTAADDR11
address_a[11] => ram_block1a11.PORTAADDR11
address_a[11] => ram_block1a12.PORTAADDR11
address_a[11] => ram_block1a13.PORTAADDR11
address_a[11] => ram_block1a14.PORTAADDR11
address_a[11] => ram_block1a15.PORTAADDR11
address_a[12] => ram_block1a0.PORTAADDR12
address_a[12] => ram_block1a1.PORTAADDR12
address_a[12] => ram_block1a2.PORTAADDR12
address_a[12] => ram_block1a3.PORTAADDR12
address_a[12] => ram_block1a4.PORTAADDR12
address_a[12] => ram_block1a5.PORTAADDR12
address_a[12] => ram_block1a6.PORTAADDR12
address_a[12] => ram_block1a7.PORTAADDR12
address_a[12] => ram_block1a8.PORTAADDR12
address_a[12] => ram_block1a9.PORTAADDR12
address_a[12] => ram_block1a10.PORTAADDR12
address_a[12] => ram_block1a11.PORTAADDR12
address_a[12] => ram_block1a12.PORTAADDR12
address_a[12] => ram_block1a13.PORTAADDR12
address_a[12] => ram_block1a14.PORTAADDR12
address_a[12] => ram_block1a15.PORTAADDR12
address_a[13] => address_reg_a[0].DATAIN
address_a[13] => decode_c8a:rden_decode.data[0]
clock0 => ram_block1a0.CLK0 clock0 => ram_block1a0.CLK0
clock0 => ram_block1a1.CLK0 clock0 => ram_block1a1.CLK0
clock0 => ram_block1a2.CLK0 clock0 => ram_block1a2.CLK0
@@ -102,13 +310,73 @@ clock0 => ram_block1a4.CLK0
clock0 => ram_block1a5.CLK0 clock0 => ram_block1a5.CLK0
clock0 => ram_block1a6.CLK0 clock0 => ram_block1a6.CLK0
clock0 => ram_block1a7.CLK0 clock0 => ram_block1a7.CLK0
q_a[0] <= ram_block1a0.PORTADATAOUT clock0 => ram_block1a8.CLK0
q_a[1] <= ram_block1a1.PORTADATAOUT clock0 => ram_block1a9.CLK0
q_a[2] <= ram_block1a2.PORTADATAOUT clock0 => ram_block1a10.CLK0
q_a[3] <= ram_block1a3.PORTADATAOUT clock0 => ram_block1a11.CLK0
q_a[4] <= ram_block1a4.PORTADATAOUT clock0 => ram_block1a12.CLK0
q_a[5] <= ram_block1a5.PORTADATAOUT clock0 => ram_block1a13.CLK0
q_a[6] <= ram_block1a6.PORTADATAOUT clock0 => ram_block1a14.CLK0
q_a[7] <= ram_block1a7.PORTADATAOUT clock0 => ram_block1a15.CLK0
clock0 => address_reg_a[0].CLK
clock0 => out_address_reg_a[0].CLK
q_a[0] <= mux_3nb:mux2.result[0]
q_a[1] <= mux_3nb:mux2.result[1]
q_a[2] <= mux_3nb:mux2.result[2]
q_a[3] <= mux_3nb:mux2.result[3]
q_a[4] <= mux_3nb:mux2.result[4]
q_a[5] <= mux_3nb:mux2.result[5]
q_a[6] <= mux_3nb:mux2.result[6]
q_a[7] <= mux_3nb:mux2.result[7]
|spectrum|rom0:rom|altsyncram:altsyncram_component|altsyncram_qh91:auto_generated|decode_c8a:rden_decode
data[0] => eq_node[1].IN0
data[0] => eq_node[0].IN0
eq[0] <= eq_node[0].DB_MAX_OUTPUT_PORT_TYPE
eq[1] <= eq_node[1].DB_MAX_OUTPUT_PORT_TYPE
|spectrum|rom0:rom|altsyncram:altsyncram_component|altsyncram_qh91:auto_generated|mux_3nb:mux2
data[0] => result_node[0].IN1
data[1] => result_node[1].IN1
data[2] => result_node[2].IN1
data[3] => result_node[3].IN1
data[4] => result_node[4].IN1
data[5] => result_node[5].IN1
data[6] => result_node[6].IN1
data[7] => result_node[7].IN1
data[8] => result_node[0].IN1
data[9] => result_node[1].IN1
data[10] => result_node[2].IN1
data[11] => result_node[3].IN1
data[12] => result_node[4].IN1
data[13] => result_node[5].IN1
data[14] => result_node[6].IN1
data[15] => result_node[7].IN1
result[0] <= result_node[0].DB_MAX_OUTPUT_PORT_TYPE
result[1] <= result_node[1].DB_MAX_OUTPUT_PORT_TYPE
result[2] <= result_node[2].DB_MAX_OUTPUT_PORT_TYPE
result[3] <= result_node[3].DB_MAX_OUTPUT_PORT_TYPE
result[4] <= result_node[4].DB_MAX_OUTPUT_PORT_TYPE
result[5] <= result_node[5].DB_MAX_OUTPUT_PORT_TYPE
result[6] <= result_node[6].DB_MAX_OUTPUT_PORT_TYPE
result[7] <= result_node[7].DB_MAX_OUTPUT_PORT_TYPE
sel[0] => result_node[7].IN0
sel[0] => _.IN0
sel[0] => result_node[6].IN0
sel[0] => _.IN0
sel[0] => result_node[5].IN0
sel[0] => _.IN0
sel[0] => result_node[4].IN0
sel[0] => _.IN0
sel[0] => result_node[3].IN0
sel[0] => _.IN0
sel[0] => result_node[2].IN0
sel[0] => _.IN0
sel[0] => result_node[1].IN0
sel[0] => _.IN0
sel[0] => result_node[0].IN0
sel[0] => _.IN0
db/spectrum.hif
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db/spectrum.lpc.html
+34 -2
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@@ -16,8 +16,40 @@
<TH>Output only Bidir</TH> <TH>Output only Bidir</TH>
</TR> </TR>
<TR > <TR >
<TD >rom|altsyncram_component|auto_generated|mux2</TD>
<TD >17</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >rom|altsyncram_component|auto_generated|rden_decode</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >rom|altsyncram_component|auto_generated</TD> <TD >rom|altsyncram_component|auto_generated</TD>
<TD >4</TD> <TD >15</TD>
<TD >0</TD> <TD >0</TD>
<TD >0</TD> <TD >0</TD>
<TD >0</TD> <TD >0</TD>
@@ -33,7 +65,7 @@
</TR> </TR>
<TR > <TR >
<TD >rom</TD> <TD >rom</TD>
<TD >4</TD> <TD >15</TD>
<TD >0</TD> <TD >0</TD>
<TD >0</TD> <TD >0</TD>
<TD >0</TD> <TD >0</TD>
db/spectrum.lpc.rdb
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db/spectrum.lpc.txt
+32 -2
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@@ -1,8 +1,38 @@
+--------------------------------------------------------------------------------+ +--------------------------------------------------------------------------------+
; Legal Partition Candidates ; ; Legal Partition Candidates ;
+--------------------------------------------------------------------------------+ +--------------------------------------------------------------------------------+
Hierarchy : rom|altsyncram_component|auto_generated|mux2
Input : 17
Constant Input : 0
Unused Input : 0
Floating Input : 0
Output : 8
Constant Output : 0
Unused Output : 0
Floating Output : 0
Bidir : 0
Constant Bidir : 0
Unused Bidir : 0
Input only Bidir : 0
Output only Bidir : 0
Hierarchy : rom|altsyncram_component|auto_generated|rden_decode
Input : 1
Constant Input : 0
Unused Input : 0
Floating Input : 0
Output : 2
Constant Output : 0
Unused Output : 0
Floating Output : 0
Bidir : 0
Constant Bidir : 0
Unused Bidir : 0
Input only Bidir : 0
Output only Bidir : 0
Hierarchy : rom|altsyncram_component|auto_generated Hierarchy : rom|altsyncram_component|auto_generated
Input : 4 Input : 15
Constant Input : 0 Constant Input : 0
Unused Input : 0 Unused Input : 0
Floating Input : 0 Floating Input : 0
@@ -17,7 +47,7 @@ Input only Bidir : 0
Output only Bidir : 0 Output only Bidir : 0
Hierarchy : rom Hierarchy : rom
Input : 4 Input : 15
Constant Input : 0 Constant Input : 0
Unused Input : 0 Unused Input : 0
Floating Input : 0 Floating Input : 0
db/spectrum.map.bpm
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db/spectrum.map.cdb
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db/spectrum.map.hdb
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db/spectrum.map.kpt
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db/spectrum.map.qmsg
+23 -19
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@@ -1,19 +1,23 @@
{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1648633107075 ""} { "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1648635132020 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II 32-bit " "Running Quartus II 32-bit Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition " "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1648633107076 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed Mar 30 12:38:26 2022 " "Processing started: Wed Mar 30 12:38:26 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1648633107076 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1648633107076 ""} { "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II 32-bit " "Running Quartus II 32-bit Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition " "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1648635132022 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed Mar 30 13:12:11 2022 " "Processing started: Wed Mar 30 13:12:11 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1648635132022 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1648635132022 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off spectrum -c spectrum " "Command: quartus_map --read_settings_files=on --write_settings_files=off spectrum -c spectrum" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1648633107076 ""} { "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off spectrum -c spectrum " "Command: quartus_map --read_settings_files=on --write_settings_files=off spectrum -c spectrum" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1648635132022 ""}
{ "Warning" "WQCU_PARALLEL_NO_LICENSE" "" "Parallel compilation is not licensed and has been disabled" { } { } 0 20028 "Parallel compilation is not licensed and has been disabled" 0 0 "Quartus II" 0 -1 1648633107239 ""} { "Warning" "WQCU_PARALLEL_NO_LICENSE" "" "Parallel compilation is not licensed and has been disabled" { } { } 0 20028 "Parallel compilation is not licensed and has been disabled" 0 0 "Quartus II" 0 -1 1648635132212 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "spectrum.v 1 1 " "Found 1 design units, including 1 entities, in source file spectrum.v" { { "Info" "ISGN_ENTITY_NAME" "1 spectrum " "Found entity 1: spectrum" { } { { "spectrum.v" "" { Text "/home/benny/work/fpga/projects/spectrum.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1648633107303 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1648633107303 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "spectrum.v 1 1 " "Found 1 design units, including 1 entities, in source file spectrum.v" { { "Info" "ISGN_ENTITY_NAME" "1 spectrum " "Found entity 1: spectrum" { } { { "spectrum.v" "" { Text "/home/benny/work/fpga/projects/spectrum.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1648635132282 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1648635132282 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "rom0.v 1 1 " "Found 1 design units, including 1 entities, in source file rom0.v" { { "Info" "ISGN_ENTITY_NAME" "1 rom0 " "Found entity 1: rom0" { } { { "rom0.v" "" { Text "/home/benny/work/fpga/projects/rom0.v" 39 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1648633107306 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1648633107306 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "rom0.v 1 1 " "Found 1 design units, including 1 entities, in source file rom0.v" { { "Info" "ISGN_ENTITY_NAME" "1 rom0 " "Found entity 1: rom0" { } { { "rom0.v" "" { Text "/home/benny/work/fpga/projects/rom0.v" 39 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1648635132284 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1648635132284 ""}
{ "Info" "ISGN_START_ELABORATION_TOP" "spectrum " "Elaborating entity \"spectrum\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Quartus II" 0 -1 1648633107357 ""} { "Info" "ISGN_START_ELABORATION_TOP" "spectrum " "Elaborating entity \"spectrum\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Quartus II" 0 -1 1648635132338 ""}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 21 spectrum.v(19) " "Verilog HDL assignment warning at spectrum.v(19): truncated value with size 32 to match size of target (21)" { } { { "spectrum.v" "" { Text "/home/benny/work/fpga/projects/spectrum.v" 19 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1648633107359 "|spectrum"} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 22 spectrum.v(18) " "Verilog HDL assignment warning at spectrum.v(18): truncated value with size 32 to match size of target (22)" { } { { "spectrum.v" "" { Text "/home/benny/work/fpga/projects/spectrum.v" 18 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1648635132340 "|spectrum"}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 spectrum.v(21) " "Verilog HDL assignment warning at spectrum.v(21): truncated value with size 32 to match size of target (3)" { } { { "spectrum.v" "" { Text "/home/benny/work/fpga/projects/spectrum.v" 21 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1648633107359 "|spectrum"} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 14 spectrum.v(20) " "Verilog HDL assignment warning at spectrum.v(20): truncated value with size 32 to match size of target (14)" { } { { "spectrum.v" "" { Text "/home/benny/work/fpga/projects/spectrum.v" 20 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1648635132340 "|spectrum"}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "rom0 rom0:rom " "Elaborating entity \"rom0\" for hierarchy \"rom0:rom\"" { } { { "spectrum.v" "rom" { Text "/home/benny/work/fpga/projects/spectrum.v" 14 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648633107369 ""} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "rom0 rom0:rom " "Elaborating entity \"rom0\" for hierarchy \"rom0:rom\"" { } { { "spectrum.v" "rom" { Text "/home/benny/work/fpga/projects/spectrum.v" 13 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648635132350 ""}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram rom0:rom\|altsyncram:altsyncram_component " "Elaborating entity \"altsyncram\" for hierarchy \"rom0:rom\|altsyncram:altsyncram_component\"" { } { { "rom0.v" "altsyncram_component" { Text "/home/benny/work/fpga/projects/rom0.v" 81 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648633107416 ""} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram rom0:rom\|altsyncram:altsyncram_component " "Elaborating entity \"altsyncram\" for hierarchy \"rom0:rom\|altsyncram:altsyncram_component\"" { } { { "rom0.v" "altsyncram_component" { Text "/home/benny/work/fpga/projects/rom0.v" 81 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648635132402 ""}
{ "Info" "ISGN_ELABORATION_HEADER" "rom0:rom\|altsyncram:altsyncram_component " "Elaborated megafunction instantiation \"rom0:rom\|altsyncram:altsyncram_component\"" { } { { "rom0.v" "" { Text "/home/benny/work/fpga/projects/rom0.v" 81 0 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Quartus II" 0 -1 1648633107417 ""} { "Info" "ISGN_ELABORATION_HEADER" "rom0:rom\|altsyncram:altsyncram_component " "Elaborated megafunction instantiation \"rom0:rom\|altsyncram:altsyncram_component\"" { } { { "rom0.v" "" { Text "/home/benny/work/fpga/projects/rom0.v" 81 0 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Quartus II" 0 -1 1648635132403 ""}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "rom0:rom\|altsyncram:altsyncram_component " "Instantiated megafunction \"rom0:rom\|altsyncram:altsyncram_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "address_aclr_a NONE " "Parameter \"address_aclr_a\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648633107417 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_input_a BYPASS " "Parameter \"clock_enable_input_a\" = \"BYPASS\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648633107417 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_output_a BYPASS " "Parameter \"clock_enable_output_a\" = \"BYPASS\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648633107417 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "init_file led_patterns.mif " "Parameter \"init_file\" = \"led_patterns.mif\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648633107417 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family Cyclone IV E " "Parameter \"intended_device_family\" = \"Cyclone IV E\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648633107417 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_hint ENABLE_RUNTIME_MOD=NO " "Parameter \"lpm_hint\" = \"ENABLE_RUNTIME_MOD=NO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648633107417 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type altsyncram " "Parameter \"lpm_type\" = \"altsyncram\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648633107417 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "numwords_a 8 " "Parameter \"numwords_a\" = \"8\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648633107417 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "operation_mode ROM " "Parameter \"operation_mode\" = \"ROM\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648633107417 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_aclr_a NONE " "Parameter \"outdata_aclr_a\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648633107417 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_reg_a CLOCK0 " "Parameter \"outdata_reg_a\" = \"CLOCK0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648633107417 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "widthad_a 3 " "Parameter \"widthad_a\" = \"3\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648633107417 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_a 8 " "Parameter \"width_a\" = \"8\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648633107417 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_byteena_a 1 " "Parameter \"width_byteena_a\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648633107417 ""} } { { "rom0.v" "" { Text "/home/benny/work/fpga/projects/rom0.v" 81 0 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Quartus II" 0 -1 1648633107417 ""} { "Info" "ISGN_MEGAFN_PARAM_TOP" "rom0:rom\|altsyncram:altsyncram_component " "Instantiated megafunction \"rom0:rom\|altsyncram:altsyncram_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "address_aclr_a NONE " "Parameter \"address_aclr_a\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648635132403 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_input_a BYPASS " "Parameter \"clock_enable_input_a\" = \"BYPASS\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648635132403 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_output_a BYPASS " "Parameter \"clock_enable_output_a\" = \"BYPASS\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648635132403 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "init_file ./rom/gw03.hex " "Parameter \"init_file\" = \"./rom/gw03.hex\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648635132403 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family Cyclone IV E " "Parameter \"intended_device_family\" = \"Cyclone IV E\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648635132403 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_hint ENABLE_RUNTIME_MOD=NO " "Parameter \"lpm_hint\" = \"ENABLE_RUNTIME_MOD=NO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648635132403 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type altsyncram " "Parameter \"lpm_type\" = \"altsyncram\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648635132403 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "numwords_a 16384 " "Parameter \"numwords_a\" = \"16384\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648635132403 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "operation_mode ROM " "Parameter \"operation_mode\" = \"ROM\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648635132403 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_aclr_a NONE " "Parameter \"outdata_aclr_a\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648635132403 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_reg_a CLOCK0 " "Parameter \"outdata_reg_a\" = \"CLOCK0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648635132403 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "widthad_a 14 " "Parameter \"widthad_a\" = \"14\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648635132403 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_a 8 " "Parameter \"width_a\" = \"8\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648635132403 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_byteena_a 1 " "Parameter \"width_byteena_a\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648635132403 ""} } { { "rom0.v" "" { Text "/home/benny/work/fpga/projects/rom0.v" 81 0 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Quartus II" 0 -1 1648635132403 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_ro91.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_ro91.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_ro91 " "Found entity 1: altsyncram_ro91" { } { { "db/altsyncram_ro91.tdf" "" { Text "/home/benny/work/fpga/projects/db/altsyncram_ro91.tdf" 27 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1648633107463 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1648633107463 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_qh91.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_qh91.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_qh91 " "Found entity 1: altsyncram_qh91" { } { { "db/altsyncram_qh91.tdf" "" { Text "/home/benny/work/fpga/projects/db/altsyncram_qh91.tdf" 31 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1648635132451 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1648635132451 ""}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_ro91 rom0:rom\|altsyncram:altsyncram_component\|altsyncram_ro91:auto_generated " "Elaborating entity \"altsyncram_ro91\" for hierarchy \"rom0:rom\|altsyncram:altsyncram_component\|altsyncram_ro91:auto_generated\"" { } { { "altsyncram.tdf" "auto_generated" { Text "/home/benny/altera/13.1/quartus/libraries/megafunctions/altsyncram.tdf" 791 4 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648633107464 ""} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_qh91 rom0:rom\|altsyncram:altsyncram_component\|altsyncram_qh91:auto_generated " "Elaborating entity \"altsyncram_qh91\" for hierarchy \"rom0:rom\|altsyncram:altsyncram_component\|altsyncram_qh91:auto_generated\"" { } { { "altsyncram.tdf" "auto_generated" { Text "/home/benny/altera/13.1/quartus/libraries/megafunctions/altsyncram.tdf" 791 4 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648635132452 ""}
{ "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING" "" "Timing-Driven Synthesis is running" { } { } 0 286030 "Timing-Driven Synthesis is running" 0 0 "Quartus II" 0 -1 1648633107974 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/decode_c8a.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/decode_c8a.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 decode_c8a " "Found entity 1: decode_c8a" { } { { "db/decode_c8a.tdf" "" { Text "/home/benny/work/fpga/projects/db/decode_c8a.tdf" 22 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1648635132495 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1648635132495 ""}
{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" { } { } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Quartus II" 0 -1 1648633108175 ""} } { } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Quartus II" 0 -1 1648633108175 ""} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "decode_c8a rom0:rom\|altsyncram:altsyncram_component\|altsyncram_qh91:auto_generated\|decode_c8a:rden_decode " "Elaborating entity \"decode_c8a\" for hierarchy \"rom0:rom\|altsyncram:altsyncram_component\|altsyncram_qh91:auto_generated\|decode_c8a:rden_decode\"" { } { { "db/altsyncram_qh91.tdf" "rden_decode" { Text "/home/benny/work/fpga/projects/db/altsyncram_qh91.tdf" 40 2 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648635132495 ""}
{ "Info" "ICUT_CUT_TM_SUMMARY" "71 " "Implemented 71 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "1 " "Implemented 1 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Quartus II" 0 -1 1648633108217 ""} { "Info" "ICUT_CUT_TM_OPINS" "8 " "Implemented 8 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Quartus II" 0 -1 1648633108217 ""} { "Info" "ICUT_CUT_TM_LCELLS" "54 " "Implemented 54 logic cells" { } { } 0 21061 "Implemented %1!d! logic cells" 0 0 "Quartus II" 0 -1 1648633108217 ""} { "Info" "ICUT_CUT_TM_RAMS" "8 " "Implemented 8 RAM segments" { } { } 0 21064 "Implemented %1!d! RAM segments" 0 0 "Quartus II" 0 -1 1648633108217 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Quartus II" 0 -1 1648633108217 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_3nb.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/mux_3nb.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_3nb " "Found entity 1: mux_3nb" { } { { "db/mux_3nb.tdf" "" { Text "/home/benny/work/fpga/projects/db/mux_3nb.tdf" 22 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1648635132537 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1648635132537 ""}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 3 s Quartus II 32-bit " "Quartus II 32-bit Analysis & Synthesis was successful. 0 errors, 3 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "384 " "Peak virtual memory: 384 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1648633108224 ""} { "Info" "IQEXE_END_BANNER_TIME" "Wed Mar 30 12:38:28 2022 " "Processing ended: Wed Mar 30 12:38:28 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1648633108224 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Elapsed time: 00:00:02" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1648633108224 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1648633108224 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1648633108224 ""} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "mux_3nb rom0:rom\|altsyncram:altsyncram_component\|altsyncram_qh91:auto_generated\|mux_3nb:mux2 " "Elaborating entity \"mux_3nb\" for hierarchy \"rom0:rom\|altsyncram:altsyncram_component\|altsyncram_qh91:auto_generated\|mux_3nb:mux2\"" { } { { "db/altsyncram_qh91.tdf" "mux2" { Text "/home/benny/work/fpga/projects/db/altsyncram_qh91.tdf" 41 2 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648635132537 ""}
{ "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING" "" "Timing-Driven Synthesis is running" { } { } 0 286030 "Timing-Driven Synthesis is running" 0 0 "Quartus II" 0 -1 1648635133078 ""}
{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" { } { } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Quartus II" 0 -1 1648635133316 ""} } { } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Quartus II" 0 -1 1648635133316 ""}
{ "Info" "ICUT_CUT_TM_SUMMARY" "79 " "Implemented 79 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "1 " "Implemented 1 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Quartus II" 0 -1 1648635133366 ""} { "Info" "ICUT_CUT_TM_OPINS" "8 " "Implemented 8 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Quartus II" 0 -1 1648635133366 ""} { "Info" "ICUT_CUT_TM_LCELLS" "54 " "Implemented 54 logic cells" { } { } 0 21061 "Implemented %1!d! logic cells" 0 0 "Quartus II" 0 -1 1648635133366 ""} { "Info" "ICUT_CUT_TM_RAMS" "16 " "Implemented 16 RAM segments" { } { } 0 21064 "Implemented %1!d! RAM segments" 0 0 "Quartus II" 0 -1 1648635133366 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Quartus II" 0 -1 1648635133366 ""}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 3 s Quartus II 32-bit " "Quartus II 32-bit Analysis & Synthesis was successful. 0 errors, 3 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "392 " "Peak virtual memory: 392 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1648635133374 ""} { "Info" "IQEXE_END_BANNER_TIME" "Wed Mar 30 13:12:13 2022 " "Processing ended: Wed Mar 30 13:12:13 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1648635133374 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Elapsed time: 00:00:02" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1648635133374 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Total CPU time (on all processors): 00:00:02" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1648635133374 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1648635133374 ""}
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{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1648633118951 ""} { "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1648635144709 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "TimeQuest Timing Analyzer Quartus II 32-bit " "Running Quartus II 32-bit TimeQuest Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition " "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1648633118952 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed Mar 30 12:38:38 2022 " "Processing started: Wed Mar 30 12:38:38 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1648633118952 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1648633118952 ""} { "Info" "IQEXE_START_BANNER_PRODUCT" "TimeQuest Timing Analyzer Quartus II 32-bit " "Running Quartus II 32-bit TimeQuest Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition " "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1648635144710 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed Mar 30 13:12:24 2022 " "Processing started: Wed Mar 30 13:12:24 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1648635144710 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1648635144710 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta spectrum -c spectrum " "Command: quartus_sta spectrum -c spectrum" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1648633118952 ""} { "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta spectrum -c spectrum " "Command: quartus_sta spectrum -c spectrum" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1648635144711 ""}
{ "Info" "0" "" "qsta_default_script.tcl version: #1" { } { } 0 0 "qsta_default_script.tcl version: #1" 0 0 "Quartus II" 0 0 1648633118980 ""} { "Info" "0" "" "qsta_default_script.tcl version: #1" { } { } 0 0 "qsta_default_script.tcl version: #1" 0 0 "Quartus II" 0 0 1648635144738 ""}
{ "Warning" "WQCU_PARALLEL_NO_LICENSE" "" "Parallel compilation is not licensed and has been disabled" { } { } 0 20028 "Parallel compilation is not licensed and has been disabled" 0 0 "Quartus II" 0 -1 1648633119080 ""} { "Warning" "WQCU_PARALLEL_NO_LICENSE" "" "Parallel compilation is not licensed and has been disabled" { } { } 0 20028 "Parallel compilation is not licensed and has been disabled" 0 0 "Quartus II" 0 -1 1648635144851 ""}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Core supply voltage 1.2V " "Core supply voltage is 1.2V" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Quartus II" 0 -1 1648633119082 ""} { "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Core supply voltage 1.2V " "Core supply voltage is 1.2V" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Quartus II" 0 -1 1648635144852 ""}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Quartus II" 0 -1 1648633119126 ""} { "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Quartus II" 0 -1 1648635144896 ""}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Quartus II" 0 -1 1648633119126 ""} { "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Quartus II" 0 -1 1648635144896 ""}
{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "spectrum.sdc " "Synopsys Design Constraints File file not found: 'spectrum.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." { } { } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Quartus II" 0 -1 1648633119323 ""} { "Critical Warning" "WSTA_SDC_NOT_FOUND" "spectrum.sdc " "Synopsys Design Constraints File file not found: 'spectrum.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." { } { } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Quartus II" 0 -1 1648635145098 ""}
{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" { } { } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "Quartus II" 0 -1 1648633119324 ""} { "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" { } { } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "Quartus II" 0 -1 1648635145098 ""}
{ "Info" "ISTA_DERIVE_CLOCKS_INFO" "Deriving Clocks " "Deriving Clocks" { { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name CLOCK_50 CLOCK_50 " "create_clock -period 1.000 -name CLOCK_50 CLOCK_50" { } { } 0 332105 "%1!s!" 0 0 "Quartus II" 0 -1 1648633119325 ""} } { } 0 332105 "%1!s!" 0 0 "Quartus II" 0 -1 1648633119325 ""} { "Info" "ISTA_DERIVE_CLOCKS_INFO" "Deriving Clocks " "Deriving Clocks" { { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name CLOCK_50 CLOCK_50 " "create_clock -period 1.000 -name CLOCK_50 CLOCK_50" { } { } 0 332105 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145099 ""} } { } 0 332105 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145099 ""}
{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" { } { } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Quartus II" 0 -1 1648633119451 ""} { "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" { } { } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Quartus II" 0 -1 1648635145225 ""}
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Quartus II" 0 -1 1648633119452 ""} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145225 ""}
{ "Info" "0" "" "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" { } { } 0 0 "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "Quartus II" 0 0 1648633119452 ""} { "Info" "0" "" "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" { } { } 0 0 "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "Quartus II" 0 0 1648635145226 ""}
{ "Info" "0" "" "Analyzing Slow 1200mV 85C Model" { } { } 0 0 "Analyzing Slow 1200mV 85C Model" 0 0 "Quartus II" 0 0 1648633119457 ""} { "Info" "0" "" "Analyzing Slow 1200mV 85C Model" { } { } 0 0 "Analyzing Slow 1200mV 85C Model" 0 0 "Quartus II" 0 0 1648635145236 ""}
{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Quartus II" 0 -1 1648633119465 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Quartus II" 0 -1 1648633119465 ""} { "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Quartus II" 0 -1 1648635145248 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Quartus II" 0 -1 1648635145248 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "setup -2.763 " "Worst-case setup slack is -2.763" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633119466 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633119466 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.763 -43.394 CLOCK_50 " " -2.763 -43.394 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633119466 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1648633119466 ""} { "Info" "ISTA_WORST_CASE_SLACK" "setup -1.788 " "Worst-case setup slack is -1.788" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145249 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145249 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.788 -88.557 CLOCK_50 " " -1.788 -88.557 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145249 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1648635145249 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.343 " "Worst-case hold slack is 0.343" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633119466 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633119466 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.343 0.000 CLOCK_50 " " 0.343 0.000 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633119466 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1648633119466 ""} { "Info" "ISTA_WORST_CASE_SLACK" "hold 0.260 " "Worst-case hold slack is 0.260" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145250 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145250 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.260 0.000 CLOCK_50 " " 0.260 0.000 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145250 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1648635145250 ""}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1648633119467 ""} { "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1648635145251 ""}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1648633119468 ""} { "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1648635145251 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -3.000 " "Worst-case minimum pulse width slack is -3.000" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633119468 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633119468 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -3.000 -46.633 CLOCK_50 " " -3.000 -46.633 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633119468 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1648633119468 ""} { "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -3.000 " "Worst-case minimum pulse width slack is -3.000" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145252 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145252 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -3.000 -110.836 CLOCK_50 " " -3.000 -110.836 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145252 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1648635145252 ""}
{ "Info" "0" "" "Analyzing Slow 1200mV 0C Model" { } { } 0 0 "Analyzing Slow 1200mV 0C Model" 0 0 "Quartus II" 0 0 1648633119483 ""} { "Info" "0" "" "Analyzing Slow 1200mV 0C Model" { } { } 0 0 "Analyzing Slow 1200mV 0C Model" 0 0 "Quartus II" 0 0 1648635145268 ""}
{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Quartus II" 0 -1 1648633119506 ""} { "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Quartus II" 0 -1 1648635145291 ""}
{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Quartus II" 0 -1 1648633119876 ""} { "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Quartus II" 0 -1 1648635145672 ""}
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Quartus II" 0 -1 1648633119892 ""} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145692 ""}
{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Quartus II" 0 -1 1648633119894 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Quartus II" 0 -1 1648633119894 ""} { "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Quartus II" 0 -1 1648635145695 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Quartus II" 0 -1 1648635145695 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "setup -2.331 " "Worst-case setup slack is -2.331" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633119895 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633119895 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.331 -34.994 CLOCK_50 " " -2.331 -34.994 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633119895 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1648633119895 ""} { "Info" "ISTA_WORST_CASE_SLACK" "setup -1.527 " "Worst-case setup slack is -1.527" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145696 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145696 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.527 -72.611 CLOCK_50 " " -1.527 -72.611 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145696 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1648635145696 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.299 " "Worst-case hold slack is 0.299" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633119896 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633119896 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.299 0.000 CLOCK_50 " " 0.299 0.000 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633119896 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1648633119896 ""} { "Info" "ISTA_WORST_CASE_SLACK" "hold 0.255 " "Worst-case hold slack is 0.255" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145698 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145698 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.255 0.000 CLOCK_50 " " 0.255 0.000 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145698 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1648635145698 ""}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1648633119897 ""} { "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1648635145699 ""}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1648633119898 ""} { "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1648635145700 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -3.000 " "Worst-case minimum pulse width slack is -3.000" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633119899 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633119899 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -3.000 -46.624 CLOCK_50 " " -3.000 -46.624 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633119899 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1648633119899 ""} { "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -3.000 " "Worst-case minimum pulse width slack is -3.000" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145701 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145701 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -3.000 -110.824 CLOCK_50 " " -3.000 -110.824 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145701 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1648635145701 ""}
{ "Info" "0" "" "Analyzing Fast 1200mV 0C Model" { } { } 0 0 "Analyzing Fast 1200mV 0C Model" 0 0 "Quartus II" 0 0 1648633119916 ""} { "Info" "0" "" "Analyzing Fast 1200mV 0C Model" { } { } 0 0 "Analyzing Fast 1200mV 0C Model" 0 0 "Quartus II" 0 0 1648635145717 ""}
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Quartus II" 0 -1 1648633120038 ""} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145841 ""}
{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Quartus II" 0 -1 1648633120038 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Quartus II" 0 -1 1648633120038 ""} { "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Quartus II" 0 -1 1648635145842 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Quartus II" 0 -1 1648635145842 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "setup -1.122 " "Worst-case setup slack is -1.122" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633120040 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633120040 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.122 -9.363 CLOCK_50 " " -1.122 -9.363 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633120040 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1648633120040 ""} { "Info" "ISTA_WORST_CASE_SLACK" "setup -0.529 " "Worst-case setup slack is -0.529" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145843 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145843 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.529 -18.538 CLOCK_50 " " -0.529 -18.538 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145843 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1648635145843 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.178 " "Worst-case hold slack is 0.178" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633120043 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633120043 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.178 0.000 CLOCK_50 " " 0.178 0.000 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633120043 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1648633120043 ""} { "Info" "ISTA_WORST_CASE_SLACK" "hold 0.123 " "Worst-case hold slack is 0.123" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145845 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145845 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.123 0.000 CLOCK_50 " " 0.123 0.000 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145845 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1648635145845 ""}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1648633120045 ""} { "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1648635145847 ""}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1648633120047 ""} { "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1648635145848 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -3.000 " "Worst-case minimum pulse width slack is -3.000" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633120049 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633120049 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -3.000 -45.480 CLOCK_50 " " -3.000 -45.480 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648633120049 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1648633120049 ""} { "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -3.000 " "Worst-case minimum pulse width slack is -3.000" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145850 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145850 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -3.000 -93.684 CLOCK_50 " " -3.000 -93.684 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1648635145850 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1648635145850 ""}
{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Quartus II" 0 -1 1648633120349 ""} { "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Quartus II" 0 -1 1648635146144 ""}
{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Quartus II" 0 -1 1648633120349 ""} { "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Quartus II" 0 -1 1648635146145 ""}
{ "Info" "IQEXE_ERROR_COUNT" "TimeQuest Timing Analyzer 0 s 5 s Quartus II 32-bit " "Quartus II 32-bit TimeQuest Timing Analyzer was successful. 0 errors, 5 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "415 " "Peak virtual memory: 415 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1648633120383 ""} { "Info" "IQEXE_END_BANNER_TIME" "Wed Mar 30 12:38:40 2022 " "Processing ended: Wed Mar 30 12:38:40 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1648633120383 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Elapsed time: 00:00:02" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1648633120383 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Total CPU time (on all processors): 00:00:02" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1648633120383 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1648633120383 ""} { "Info" "IQEXE_ERROR_COUNT" "TimeQuest Timing Analyzer 0 s 5 s Quartus II 32-bit " "Quartus II 32-bit TimeQuest Timing Analyzer was successful. 0 errors, 5 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "407 " "Peak virtual memory: 407 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1648635146186 ""} { "Info" "IQEXE_END_BANNER_TIME" "Wed Mar 30 13:12:26 2022 " "Processing ended: Wed Mar 30 13:12:26 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1648635146186 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Elapsed time: 00:00:02" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1648635146186 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Total CPU time (on all processors): 00:00:02" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1648635146186 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1648635146186 ""}
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greybox_tmp/cbx_args.txt
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@@ -1,13 +1,13 @@
ADDRESS_ACLR_A=NONE ADDRESS_ACLR_A=NONE
CLOCK_ENABLE_INPUT_A=BYPASS CLOCK_ENABLE_INPUT_A=BYPASS
CLOCK_ENABLE_OUTPUT_A=BYPASS CLOCK_ENABLE_OUTPUT_A=BYPASS
INIT_FILE=led_patterns.mif INIT_FILE=./rom/gw03.hex
INTENDED_DEVICE_FAMILY="Cyclone IV E" INTENDED_DEVICE_FAMILY="Cyclone IV E"
NUMWORDS_A=8 NUMWORDS_A=16384
OPERATION_MODE=ROM OPERATION_MODE=ROM
OUTDATA_ACLR_A=NONE OUTDATA_ACLR_A=NONE
OUTDATA_REG_A=CLOCK0 OUTDATA_REG_A=CLOCK0
WIDTHAD_A=3 WIDTHAD_A=14
WIDTH_A=8 WIDTH_A=8
WIDTH_BYTEENA_A=1 WIDTH_BYTEENA_A=1
DEVICE_FAMILY="Cyclone IV E" DEVICE_FAMILY="Cyclone IV E"
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incremental_db/compiled_partitions/spectrum.root_partition.map.kpt
BIN
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output_files/spectrum.asm.rpt
+8 -8
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@@ -1,5 +1,5 @@
Assembler report for spectrum Assembler report for spectrum
Wed Mar 30 12:38:37 2022 Wed Mar 30 13:12:23 2022
Quartus II 32-bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition Quartus II 32-bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
@@ -37,7 +37,7 @@ applicable agreement for further details.
+---------------------------------------------------------------+ +---------------------------------------------------------------+
; Assembler Summary ; ; Assembler Summary ;
+-----------------------+---------------------------------------+ +-----------------------+---------------------------------------+
; Assembler Status ; Successful - Wed Mar 30 12:38:37 2022 ; ; Assembler Status ; Successful - Wed Mar 30 13:12:23 2022 ;
; Revision Name ; spectrum ; ; Revision Name ; spectrum ;
; Top-level Entity Name ; spectrum ; ; Top-level Entity Name ; spectrum ;
; Family ; Cyclone IV E ; ; Family ; Cyclone IV E ;
@@ -162,8 +162,8 @@ Default Value : On
; Option ; Setting ; ; Option ; Setting ;
+----------------+-----------------------+ +----------------+-----------------------+
; Device ; EP4CE22F17C6 ; ; Device ; EP4CE22F17C6 ;
; JTAG usercode ; 0x00139765 ; ; JTAG usercode ; 0x00315633 ;
; Checksum ; 0x00139765 ; ; Checksum ; 0x00315633 ;
+----------------+-----------------------+ +----------------+-----------------------+
@@ -173,14 +173,14 @@ Default Value : On
Info: ******************************************************************* Info: *******************************************************************
Info: Running Quartus II 32-bit Assembler Info: Running Quartus II 32-bit Assembler
Info: Version 13.1.0 Build 162 10/23/2013 SJ Web Edition Info: Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
Info: Processing started: Wed Mar 30 12:38:36 2022 Info: Processing started: Wed Mar 30 13:12:21 2022
Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off spectrum -c spectrum Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off spectrum -c spectrum
Info (115031): Writing out detailed assembly data for power analysis Info (115031): Writing out detailed assembly data for power analysis
Info (115030): Assembler is generating device programming files Info (115030): Assembler is generating device programming files
Info: Quartus II 32-bit Assembler was successful. 0 errors, 0 warnings Info: Quartus II 32-bit Assembler was successful. 0 errors, 0 warnings
Info: Peak virtual memory: 393 megabytes Info: Peak virtual memory: 385 megabytes
Info: Processing ended: Wed Mar 30 12:38:37 2022 Info: Processing ended: Wed Mar 30 13:12:23 2022
Info: Elapsed time: 00:00:01 Info: Elapsed time: 00:00:02
Info: Total CPU time (on all processors): 00:00:01 Info: Total CPU time (on all processors): 00:00:01
output_files/spectrum.done
+1 -1
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@@ -1 +1 @@
Wed Mar 30 12:38:42 2022 Wed Mar 30 13:12:28 2022
output_files/spectrum.eda.rpt
+5 -5
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@@ -1,5 +1,5 @@
EDA Netlist Writer report for spectrum EDA Netlist Writer report for spectrum
Wed Mar 30 12:38:42 2022 Wed Mar 30 13:12:28 2022
Quartus II 32-bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition Quartus II 32-bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
@@ -36,7 +36,7 @@ applicable agreement for further details.
+-------------------------------------------------------------------+ +-------------------------------------------------------------------+
; EDA Netlist Writer Summary ; ; EDA Netlist Writer Summary ;
+---------------------------+---------------------------------------+ +---------------------------+---------------------------------------+
; EDA Netlist Writer Status ; Successful - Wed Mar 30 12:38:42 2022 ; ; EDA Netlist Writer Status ; Successful - Wed Mar 30 13:12:28 2022 ;
; Revision Name ; spectrum ; ; Revision Name ; spectrum ;
; Top-level Entity Name ; spectrum ; ; Top-level Entity Name ; spectrum ;
; Family ; Cyclone IV E ; ; Family ; Cyclone IV E ;
@@ -88,7 +88,7 @@ applicable agreement for further details.
Info: ******************************************************************* Info: *******************************************************************
Info: Running Quartus II 32-bit EDA Netlist Writer Info: Running Quartus II 32-bit EDA Netlist Writer
Info: Version 13.1.0 Build 162 10/23/2013 SJ Web Edition Info: Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
Info: Processing started: Wed Mar 30 12:38:41 2022 Info: Processing started: Wed Mar 30 13:12:27 2022
Info: Command: quartus_eda --read_settings_files=off --write_settings_files=off spectrum -c spectrum Info: Command: quartus_eda --read_settings_files=off --write_settings_files=off spectrum -c spectrum
Info (204019): Generated file spectrum_6_1200mv_85c_slow.vo in folder "/home/benny/work/fpga/projects/simulation/modelsim/" for EDA simulation tool Info (204019): Generated file spectrum_6_1200mv_85c_slow.vo in folder "/home/benny/work/fpga/projects/simulation/modelsim/" for EDA simulation tool
Info (204019): Generated file spectrum_6_1200mv_0c_slow.vo in folder "/home/benny/work/fpga/projects/simulation/modelsim/" for EDA simulation tool Info (204019): Generated file spectrum_6_1200mv_0c_slow.vo in folder "/home/benny/work/fpga/projects/simulation/modelsim/" for EDA simulation tool
@@ -99,8 +99,8 @@ Info (204019): Generated file spectrum_6_1200mv_0c_v_slow.sdo in folder "/home/b
Info (204019): Generated file spectrum_min_1200mv_0c_v_fast.sdo in folder "/home/benny/work/fpga/projects/simulation/modelsim/" for EDA simulation tool Info (204019): Generated file spectrum_min_1200mv_0c_v_fast.sdo in folder "/home/benny/work/fpga/projects/simulation/modelsim/" for EDA simulation tool
Info (204019): Generated file spectrum_v.sdo in folder "/home/benny/work/fpga/projects/simulation/modelsim/" for EDA simulation tool Info (204019): Generated file spectrum_v.sdo in folder "/home/benny/work/fpga/projects/simulation/modelsim/" for EDA simulation tool
Info: Quartus II 32-bit EDA Netlist Writer was successful. 0 errors, 0 warnings Info: Quartus II 32-bit EDA Netlist Writer was successful. 0 errors, 0 warnings
Info: Peak virtual memory: 344 megabytes Info: Peak virtual memory: 343 megabytes
Info: Processing ended: Wed Mar 30 12:38:42 2022 Info: Processing ended: Wed Mar 30 13:12:28 2022
Info: Elapsed time: 00:00:01 Info: Elapsed time: 00:00:01
Info: Total CPU time (on all processors): 00:00:01 Info: Total CPU time (on all processors): 00:00:01
output_files/spectrum.fit.rpt
+2490 -323
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output_files/spectrum.fit.summary
+6 -6
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@@ -1,16 +1,16 @@
Fitter Status : Successful - Wed Mar 30 12:38:34 2022 Fitter Status : Successful - Wed Mar 30 13:12:20 2022
Quartus II 32-bit Version : 13.1.0 Build 162 10/23/2013 SJ Web Edition Quartus II 32-bit Version : 13.1.0 Build 162 10/23/2013 SJ Web Edition
Revision Name : spectrum Revision Name : spectrum
Top-level Entity Name : spectrum Top-level Entity Name : spectrum
Family : Cyclone IV E Family : Cyclone IV E
Device : EP4CE22F17C6 Device : EP4CE22F17C6
Timing Models : Final Timing Models : Final
Total logic elements : 33 / 22,320 ( < 1 % ) Total logic elements : 55 / 22,320 ( < 1 % )
Total combinational functions : 33 / 22,320 ( < 1 % ) Total combinational functions : 52 / 22,320 ( < 1 % )
Dedicated logic registers : 24 / 22,320 ( < 1 % ) Dedicated logic registers : 38 / 22,320 ( < 1 % )
Total registers : 24 Total registers : 38
Total pins : 9 / 154 ( 6 % ) Total pins : 9 / 154 ( 6 % )
Total virtual pins : 0 Total virtual pins : 0
Total memory bits : 64 / 608,256 ( < 1 % ) Total memory bits : 131,072 / 608,256 ( 22 % )
Embedded Multiplier 9-bit elements : 0 / 132 ( 0 % ) Embedded Multiplier 9-bit elements : 0 / 132 ( 0 % )
Total PLLs : 0 / 4 ( 0 % ) Total PLLs : 0 / 4 ( 0 % )
output_files/spectrum.flow.rpt
+17 -17
View File
@@ -1,5 +1,5 @@
Flow report for spectrum Flow report for spectrum
Wed Mar 30 12:38:42 2022 Wed Mar 30 13:12:28 2022
Quartus II 32-bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition Quartus II 32-bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
@@ -40,20 +40,20 @@ applicable agreement for further details.
+---------------------------------------------------------------------------------+ +---------------------------------------------------------------------------------+
; Flow Summary ; ; Flow Summary ;
+------------------------------------+--------------------------------------------+ +------------------------------------+--------------------------------------------+
; Flow Status ; Successful - Wed Mar 30 12:38:42 2022 ; ; Flow Status ; Successful - Wed Mar 30 13:12:28 2022 ;
; Quartus II 32-bit Version ; 13.1.0 Build 162 10/23/2013 SJ Web Edition ; ; Quartus II 32-bit Version ; 13.1.0 Build 162 10/23/2013 SJ Web Edition ;
; Revision Name ; spectrum ; ; Revision Name ; spectrum ;
; Top-level Entity Name ; spectrum ; ; Top-level Entity Name ; spectrum ;
; Family ; Cyclone IV E ; ; Family ; Cyclone IV E ;
; Device ; EP4CE22F17C6 ; ; Device ; EP4CE22F17C6 ;
; Timing Models ; Final ; ; Timing Models ; Final ;
; Total logic elements ; 33 / 22,320 ( < 1 % ) ; ; Total logic elements ; 55 / 22,320 ( < 1 % ) ;
; Total combinational functions ; 33 / 22,320 ( < 1 % ) ; ; Total combinational functions ; 52 / 22,320 ( < 1 % ) ;
; Dedicated logic registers ; 24 / 22,320 ( < 1 % ) ; ; Dedicated logic registers ; 38 / 22,320 ( < 1 % ) ;
; Total registers ; 24 ; ; Total registers ; 38 ;
; Total pins ; 9 / 154 ( 6 % ) ; ; Total pins ; 9 / 154 ( 6 % ) ;
; Total virtual pins ; 0 ; ; Total virtual pins ; 0 ;
; Total memory bits ; 64 / 608,256 ( < 1 % ) ; ; Total memory bits ; 131,072 / 608,256 ( 22 % ) ;
; Embedded Multiplier 9-bit elements ; 0 / 132 ( 0 % ) ; ; Embedded Multiplier 9-bit elements ; 0 / 132 ( 0 % ) ;
; Total PLLs ; 0 / 4 ( 0 % ) ; ; Total PLLs ; 0 / 4 ( 0 % ) ;
+------------------------------------+--------------------------------------------+ +------------------------------------+--------------------------------------------+
@@ -64,7 +64,7 @@ applicable agreement for further details.
+-------------------+---------------------+ +-------------------+---------------------+
; Option ; Setting ; ; Option ; Setting ;
+-------------------+---------------------+ +-------------------+---------------------+
; Start date & time ; 03/30/2022 12:38:27 ; ; Start date & time ; 03/30/2022 13:12:12 ;
; Main task ; Compilation ; ; Main task ; Compilation ;
; Revision Name ; spectrum ; ; Revision Name ; spectrum ;
+-------------------+---------------------+ +-------------------+---------------------+
@@ -74,7 +74,7 @@ applicable agreement for further details.
; Flow Non-Default Global Settings ; ; Flow Non-Default Global Settings ;
+--------------------------------------------------------------------------------+ +--------------------------------------------------------------------------------+
Assignment Name : COMPILER_SIGNATURE_ID Assignment Name : COMPILER_SIGNATURE_ID
Value : 0.164863310720961 Value : 0.164863513225804
Default Value : -- Default Value : --
Entity Name : -- Entity Name : --
Section Id : -- Section Id : --
@@ -160,35 +160,35 @@ Section Id : --
Module Name : Analysis & Synthesis Module Name : Analysis & Synthesis
Elapsed Time : 00:00:02 Elapsed Time : 00:00:02
Average Processors Used : 1.0 Average Processors Used : 1.0
Peak Virtual Memory : 373 MB Peak Virtual Memory : 381 MB
Total CPU Time (on all processors) : 00:00:01 Total CPU Time (on all processors) : 00:00:01
Module Name : Fitter Module Name : Fitter
Elapsed Time : 00:00:05 Elapsed Time : 00:00:06
Average Processors Used : 1.0 Average Processors Used : 1.0
Peak Virtual Memory : 600 MB Peak Virtual Memory : 595 MB
Total CPU Time (on all processors) : 00:00:06 Total CPU Time (on all processors) : 00:00:06
Module Name : Assembler Module Name : Assembler
Elapsed Time : 00:00:01 Elapsed Time : 00:00:02
Average Processors Used : 1.0 Average Processors Used : 1.0
Peak Virtual Memory : 393 MB Peak Virtual Memory : 385 MB
Total CPU Time (on all processors) : 00:00:01 Total CPU Time (on all processors) : 00:00:01
Module Name : TimeQuest Timing Analyzer Module Name : TimeQuest Timing Analyzer
Elapsed Time : 00:00:02 Elapsed Time : 00:00:02
Average Processors Used : 1.0 Average Processors Used : 1.0
Peak Virtual Memory : 415 MB Peak Virtual Memory : 407 MB
Total CPU Time (on all processors) : 00:00:02 Total CPU Time (on all processors) : 00:00:02
Module Name : EDA Netlist Writer Module Name : EDA Netlist Writer
Elapsed Time : 00:00:01 Elapsed Time : 00:00:01
Average Processors Used : 1.0 Average Processors Used : 1.0
Peak Virtual Memory : 332 MB Peak Virtual Memory : 331 MB
Total CPU Time (on all processors) : 00:00:01 Total CPU Time (on all processors) : 00:00:01
Module Name : Total Module Name : Total
Elapsed Time : 00:00:11 Elapsed Time : 00:00:13
Average Processors Used : -- Average Processors Used : --
Peak Virtual Memory : -- Peak Virtual Memory : --
Total CPU Time (on all processors) : 00:00:11 Total CPU Time (on all processors) : 00:00:11
output_files/spectrum.jdi
+1 -1
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@@ -1,6 +1,6 @@
<sld_project_info> <sld_project_info>
<project> <project>
<hash md5_digest_80b="cb6c551d4ff42d38b754"/> <hash md5_digest_80b="517dc0b141e7ba08df4a"/>
</project> </project>
<file_info> <file_info>
<file device="EP4CE22F17C6" path="spectrum.sof" usercode="0xFFFFFFFF"/> <file device="EP4CE22F17C6" path="spectrum.sof" usercode="0xFFFFFFFF"/>
output_files/spectrum.map.rpt
+99 -69
View File
@@ -1,5 +1,5 @@
Analysis & Synthesis report for spectrum Analysis & Synthesis report for spectrum
Wed Mar 30 12:38:28 2022 Wed Mar 30 13:12:13 2022
Quartus II 32-bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition Quartus II 32-bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
@@ -16,7 +16,7 @@ Quartus II 32-bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
8. Analysis & Synthesis RAM Summary 8. Analysis & Synthesis RAM Summary
9. Analysis & Synthesis IP Cores Summary 9. Analysis & Synthesis IP Cores Summary
10. General Register Statistics 10. General Register Statistics
11. Source assignments for rom0:rom|altsyncram:altsyncram_component|altsyncram_ro91:auto_generated 11. Source assignments for rom0:rom|altsyncram:altsyncram_component|altsyncram_qh91:auto_generated
12. Parameter Settings for User Entity Instance: rom0:rom|altsyncram:altsyncram_component 12. Parameter Settings for User Entity Instance: rom0:rom|altsyncram:altsyncram_component
13. altsyncram Parameter Settings by Entity Instance 13. altsyncram Parameter Settings by Entity Instance
14. Elapsed Time Per Partition 14. Elapsed Time Per Partition
@@ -46,18 +46,18 @@ applicable agreement for further details.
+---------------------------------------------------------------------------------+ +---------------------------------------------------------------------------------+
; Analysis & Synthesis Summary ; ; Analysis & Synthesis Summary ;
+------------------------------------+--------------------------------------------+ +------------------------------------+--------------------------------------------+
; Analysis & Synthesis Status ; Successful - Wed Mar 30 12:38:28 2022 ; ; Analysis & Synthesis Status ; Successful - Wed Mar 30 13:12:13 2022 ;
; Quartus II 32-bit Version ; 13.1.0 Build 162 10/23/2013 SJ Web Edition ; ; Quartus II 32-bit Version ; 13.1.0 Build 162 10/23/2013 SJ Web Edition ;
; Revision Name ; spectrum ; ; Revision Name ; spectrum ;
; Top-level Entity Name ; spectrum ; ; Top-level Entity Name ; spectrum ;
; Family ; Cyclone IV E ; ; Family ; Cyclone IV E ;
; Total logic elements ; 33 ; ; Total logic elements ; 54 ;
; Total combinational functions ; 33 ; ; Total combinational functions ; 52 ;
; Dedicated logic registers ; 24 ; ; Dedicated logic registers ; 38 ;
; Total registers ; 24 ; ; Total registers ; 38 ;
; Total pins ; 9 ; ; Total pins ; 9 ;
; Total virtual pins ; 0 ; ; Total virtual pins ; 0 ;
; Total memory bits ; 64 ; ; Total memory bits ; 131,072 ;
; Embedded Multiplier 9-bit elements ; 0 ; ; Embedded Multiplier 9-bit elements ; 0 ;
; Total PLLs ; 0 ; ; Total PLLs ; 0 ;
+------------------------------------+--------------------------------------------+ +------------------------------------+--------------------------------------------+
@@ -405,12 +405,6 @@ File Type : User Verilog HDL File
File Name with Absolute Path : /home/benny/work/fpga/projects/spectrum.v File Name with Absolute Path : /home/benny/work/fpga/projects/spectrum.v
Library : Library :
File Name with User-Entered Path : led_patterns.mif
Used in Netlist : yes
File Type : User Memory Initialization File
File Name with Absolute Path : /home/benny/work/fpga/projects/led_patterns.mif
Library :
File Name with User-Entered Path : rom0.v File Name with User-Entered Path : rom0.v
Used in Netlist : yes Used in Netlist : yes
File Type : User Wizard-Generated File File Type : User Wizard-Generated File
@@ -471,10 +465,28 @@ File Type : Megafunction
File Name with Absolute Path : /home/benny/altera/13.1/quartus/libraries/megafunctions/altdpram.inc File Name with Absolute Path : /home/benny/altera/13.1/quartus/libraries/megafunctions/altdpram.inc
Library : Library :
File Name with User-Entered Path : db/altsyncram_ro91.tdf File Name with User-Entered Path : db/altsyncram_qh91.tdf
Used in Netlist : yes Used in Netlist : yes
File Type : Auto-Generated Megafunction File Type : Auto-Generated Megafunction
File Name with Absolute Path : /home/benny/work/fpga/projects/db/altsyncram_ro91.tdf File Name with Absolute Path : /home/benny/work/fpga/projects/db/altsyncram_qh91.tdf
Library :
File Name with User-Entered Path : rom/gw03.hex
Used in Netlist : yes
File Type : Auto-Found Memory Initialization File
File Name with Absolute Path : /home/benny/work/fpga/projects/rom/gw03.hex
Library :
File Name with User-Entered Path : db/decode_c8a.tdf
Used in Netlist : yes
File Type : Auto-Generated Megafunction
File Name with Absolute Path : /home/benny/work/fpga/projects/db/decode_c8a.tdf
Library :
File Name with User-Entered Path : db/mux_3nb.tdf
Used in Netlist : yes
File Type : Auto-Generated Megafunction
File Name with Absolute Path : /home/benny/work/fpga/projects/db/mux_3nb.tdf
Library : Library :
+--------------------------------------------------------------------------------+ +--------------------------------------------------------------------------------+
@@ -485,29 +497,29 @@ Library :
+---------------------------------------------+----------------+ +---------------------------------------------+----------------+
; Resource ; Usage ; ; Resource ; Usage ;
+---------------------------------------------+----------------+ +---------------------------------------------+----------------+
; Estimated Total logic elements ; 33 ; ; Estimated Total logic elements ; 54 ;
; ; ; ; ; ;
; Total combinational functions ; 33 ; ; Total combinational functions ; 52 ;
; Logic element usage by number of LUT inputs ; ; ; Logic element usage by number of LUT inputs ; ;
; -- 4 input functions ; 10 ; ; -- 4 input functions ; 8 ;
; -- 3 input functions ; 1 ; ; -- 3 input functions ; 10 ;
; -- <=2 input functions ; 22 ; ; -- <=2 input functions ; 34 ;
; ; ; ; ; ;
; Logic elements by mode ; ; ; Logic elements by mode ; ;
; -- normal mode ; 13 ; ; -- normal mode ; 20 ;
; -- arithmetic mode ; 20 ; ; -- arithmetic mode ; 32 ;
; ; ; ; ; ;
; Total registers ; 24 ; ; Total registers ; 38 ;
; -- Dedicated logic registers ; 24 ; ; -- Dedicated logic registers ; 38 ;
; -- I/O registers ; 0 ; ; -- I/O registers ; 0 ;
; ; ; ; ; ;
; I/O pins ; 9 ; ; I/O pins ; 9 ;
; Total memory bits ; 64 ; ; Total memory bits ; 131072 ;
; Embedded Multiplier 9-bit elements ; 0 ; ; Embedded Multiplier 9-bit elements ; 0 ;
; Maximum fan-out node ; CLOCK_50~input ; ; Maximum fan-out node ; CLOCK_50~input ;
; Maximum fan-out ; 32 ; ; Maximum fan-out ; 54 ;
; Total fan-out ; 183 ; ; Total fan-out ; 473 ;
; Average fan-out ; 2.20 ; ; Average fan-out ; 3.81 ;
+---------------------------------------------+----------------+ +---------------------------------------------+----------------+
@@ -515,9 +527,9 @@ Library :
; Analysis & Synthesis Resource Utilization by Entity ; ; Analysis & Synthesis Resource Utilization by Entity ;
+--------------------------------------------------------------------------------+ +--------------------------------------------------------------------------------+
Compilation Hierarchy Node : |spectrum Compilation Hierarchy Node : |spectrum
LC Combinationals : 33 (33) LC Combinationals : 52 (44)
LC Registers : 24 (24) LC Registers : 38 (36)
Memory Bits : 64 Memory Bits : 131072
DSP Elements : 0 DSP Elements : 0
DSP 9x9 : 0 DSP 9x9 : 0
DSP 18x18 : 0 DSP 18x18 : 0
@@ -527,9 +539,9 @@ Full Hierarchy Name : |spectrum
Library Name : work Library Name : work
Compilation Hierarchy Node : |rom0:rom| Compilation Hierarchy Node : |rom0:rom|
LC Combinationals : 0 (0) LC Combinationals : 8 (0)
LC Registers : 0 (0) LC Registers : 2 (0)
Memory Bits : 64 Memory Bits : 131072
DSP Elements : 0 DSP Elements : 0
DSP 9x9 : 0 DSP 9x9 : 0
DSP 18x18 : 0 DSP 18x18 : 0
@@ -539,9 +551,9 @@ Full Hierarchy Name : |spectrum|rom0:rom
Library Name : work Library Name : work
Compilation Hierarchy Node : |altsyncram:altsyncram_component| Compilation Hierarchy Node : |altsyncram:altsyncram_component|
LC Combinationals : 0 (0) LC Combinationals : 8 (0)
LC Registers : 0 (0) LC Registers : 2 (0)
Memory Bits : 64 Memory Bits : 131072
DSP Elements : 0 DSP Elements : 0
DSP 9x9 : 0 DSP 9x9 : 0
DSP 18x18 : 0 DSP 18x18 : 0
@@ -550,16 +562,28 @@ Virtual Pins : 0
Full Hierarchy Name : |spectrum|rom0:rom|altsyncram:altsyncram_component Full Hierarchy Name : |spectrum|rom0:rom|altsyncram:altsyncram_component
Library Name : work Library Name : work
Compilation Hierarchy Node : |altsyncram_ro91:auto_generated| Compilation Hierarchy Node : |altsyncram_qh91:auto_generated|
LC Combinationals : 0 (0) LC Combinationals : 8 (0)
LC Registers : 0 (0) LC Registers : 2 (2)
Memory Bits : 64 Memory Bits : 131072
DSP Elements : 0 DSP Elements : 0
DSP 9x9 : 0 DSP 9x9 : 0
DSP 18x18 : 0 DSP 18x18 : 0
Pins : 0 Pins : 0
Virtual Pins : 0 Virtual Pins : 0
Full Hierarchy Name : |spectrum|rom0:rom|altsyncram:altsyncram_component|altsyncram_ro91:auto_generated Full Hierarchy Name : |spectrum|rom0:rom|altsyncram:altsyncram_component|altsyncram_qh91:auto_generated
Library Name : work
Compilation Hierarchy Node : |mux_3nb:mux2|
LC Combinationals : 8 (8)
LC Registers : 0 (0)
Memory Bits : 0
DSP Elements : 0
DSP 9x9 : 0
DSP 18x18 : 0
Pins : 0
Virtual Pins : 0
Full Hierarchy Name : |spectrum|rom0:rom|altsyncram:altsyncram_component|altsyncram_qh91:auto_generated|mux_3nb:mux2
Library Name : work Library Name : work
+--------------------------------------------------------------------------------+ +--------------------------------------------------------------------------------+
@@ -569,15 +593,15 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
+--------------------------------------------------------------------------------+ +--------------------------------------------------------------------------------+
; Analysis & Synthesis RAM Summary ; ; Analysis & Synthesis RAM Summary ;
+--------------------------------------------------------------------------------+ +--------------------------------------------------------------------------------+
Name : rom0:rom|altsyncram:altsyncram_component|altsyncram_ro91:auto_generated|ALTSYNCRAM Name : rom0:rom|altsyncram:altsyncram_component|altsyncram_qh91:auto_generated|ALTSYNCRAM
Type : AUTO Type : AUTO
Mode : ROM Mode : ROM
Port A Depth : 8 Port A Depth : 16384
Port A Width : 8 Port A Width : 8
Port B Depth : -- Port B Depth : --
Port B Width : -- Port B Width : --
Size : 64 Size : 131072
MIF : led_patterns.mif MIF : ./rom/gw03.hex
+--------------------------------------------------------------------------------+ +--------------------------------------------------------------------------------+
@@ -601,18 +625,18 @@ IP Include File : /home/benny/work/fpga/projects/rom0.v
+----------------------------------------------+-------+ +----------------------------------------------+-------+
; Statistic ; Value ; ; Statistic ; Value ;
+----------------------------------------------+-------+ +----------------------------------------------+-------+
; Total registers ; 24 ; ; Total registers ; 38 ;
; Number of registers using Synchronous Clear ; 0 ; ; Number of registers using Synchronous Clear ; 0 ;
; Number of registers using Synchronous Load ; 0 ; ; Number of registers using Synchronous Load ; 0 ;
; Number of registers using Asynchronous Clear ; 0 ; ; Number of registers using Asynchronous Clear ; 0 ;
; Number of registers using Asynchronous Load ; 0 ; ; Number of registers using Asynchronous Load ; 0 ;
; Number of registers using Clock Enable ; 0 ; ; Number of registers using Clock Enable ; 13 ;
; Number of registers using Preset ; 0 ; ; Number of registers using Preset ; 0 ;
+----------------------------------------------+-------+ +----------------------------------------------+-------+
+--------------------------------------------------------------------------------+ +--------------------------------------------------------------------------------+
; Source assignments for rom0:rom|altsyncram:altsyncram_component|altsyncram_ro91:auto_generated ; ; Source assignments for rom0:rom|altsyncram:altsyncram_component|altsyncram_qh91:auto_generated ;
+--------------------------------------------------------------------------------+ +--------------------------------------------------------------------------------+
Assignment : OPTIMIZE_POWER_DURING_SYNTHESIS Assignment : OPTIMIZE_POWER_DURING_SYNTHESIS
Value : NORMAL_COMPILATION Value : NORMAL_COMPILATION
@@ -658,11 +682,11 @@ Value : 8
Type : Signed Integer Type : Signed Integer
Parameter Name : WIDTHAD_A Parameter Name : WIDTHAD_A
Value : 3 Value : 14
Type : Signed Integer Type : Signed Integer
Parameter Name : NUMWORDS_A Parameter Name : NUMWORDS_A
Value : 8 Value : 16384
Type : Signed Integer Type : Signed Integer
Parameter Name : OUTDATA_REG_A Parameter Name : OUTDATA_REG_A
@@ -778,7 +802,7 @@ Value : NEW_DATA_NO_NBE_READ
Type : Untyped Type : Untyped
Parameter Name : INIT_FILE Parameter Name : INIT_FILE
Value : led_patterns.mif Value : ./rom/gw03.hex
Type : Untyped Type : Untyped
Parameter Name : INIT_FILE_LAYOUT Parameter Name : INIT_FILE_LAYOUT
@@ -830,7 +854,7 @@ Value : Cyclone IV E
Type : Untyped Type : Untyped
Parameter Name : CBXI_PARAMETER Parameter Name : CBXI_PARAMETER
Value : altsyncram_ro91 Value : altsyncram_qh91
Type : Untyped Type : Untyped
+--------------------------------------------------------------------------------+ +--------------------------------------------------------------------------------+
@@ -846,7 +870,7 @@ Note: In order to hide this table in the UI and the text report file, please set
; Entity Instance ; rom0:rom|altsyncram:altsyncram_component ; ; Entity Instance ; rom0:rom|altsyncram:altsyncram_component ;
; -- OPERATION_MODE ; ROM ; ; -- OPERATION_MODE ; ROM ;
; -- WIDTH_A ; 8 ; ; -- WIDTH_A ; 8 ;
; -- NUMWORDS_A ; 8 ; ; -- NUMWORDS_A ; 16384 ;
; -- OUTDATA_REG_A ; CLOCK0 ; ; -- OUTDATA_REG_A ; CLOCK0 ;
; -- WIDTH_B ; 1 ; ; -- WIDTH_B ; 1 ;
; -- NUMWORDS_B ; 1 ; ; -- NUMWORDS_B ; 1 ;
@@ -872,7 +896,7 @@ Note: In order to hide this table in the UI and the text report file, please set
Info: ******************************************************************* Info: *******************************************************************
Info: Running Quartus II 32-bit Analysis & Synthesis Info: Running Quartus II 32-bit Analysis & Synthesis
Info: Version 13.1.0 Build 162 10/23/2013 SJ Web Edition Info: Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
Info: Processing started: Wed Mar 30 12:38:26 2022 Info: Processing started: Wed Mar 30 13:12:11 2022
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off spectrum -c spectrum Info: Command: quartus_map --read_settings_files=on --write_settings_files=off spectrum -c spectrum
Warning (20028): Parallel compilation is not licensed and has been disabled Warning (20028): Parallel compilation is not licensed and has been disabled
Info (12021): Found 1 design units, including 1 entities, in source file spectrum.v Info (12021): Found 1 design units, including 1 entities, in source file spectrum.v
@@ -880,8 +904,8 @@ Info (12021): Found 1 design units, including 1 entities, in source file spectru
Info (12021): Found 1 design units, including 1 entities, in source file rom0.v Info (12021): Found 1 design units, including 1 entities, in source file rom0.v
Info (12023): Found entity 1: rom0 Info (12023): Found entity 1: rom0
Info (12127): Elaborating entity "spectrum" for the top level hierarchy Info (12127): Elaborating entity "spectrum" for the top level hierarchy
Warning (10230): Verilog HDL assignment warning at spectrum.v(19): truncated value with size 32 to match size of target (21) Warning (10230): Verilog HDL assignment warning at spectrum.v(18): truncated value with size 32 to match size of target (22)
Warning (10230): Verilog HDL assignment warning at spectrum.v(21): truncated value with size 32 to match size of target (3) Warning (10230): Verilog HDL assignment warning at spectrum.v(20): truncated value with size 32 to match size of target (14)
Info (12128): Elaborating entity "rom0" for hierarchy "rom0:rom" Info (12128): Elaborating entity "rom0" for hierarchy "rom0:rom"
Info (12128): Elaborating entity "altsyncram" for hierarchy "rom0:rom|altsyncram:altsyncram_component" Info (12128): Elaborating entity "altsyncram" for hierarchy "rom0:rom|altsyncram:altsyncram_component"
Info (12130): Elaborated megafunction instantiation "rom0:rom|altsyncram:altsyncram_component" Info (12130): Elaborated megafunction instantiation "rom0:rom|altsyncram:altsyncram_component"
@@ -889,32 +913,38 @@ Info (12133): Instantiated megafunction "rom0:rom|altsyncram:altsyncram_componen
Info (12134): Parameter "address_aclr_a" = "NONE" Info (12134): Parameter "address_aclr_a" = "NONE"
Info (12134): Parameter "clock_enable_input_a" = "BYPASS" Info (12134): Parameter "clock_enable_input_a" = "BYPASS"
Info (12134): Parameter "clock_enable_output_a" = "BYPASS" Info (12134): Parameter "clock_enable_output_a" = "BYPASS"
Info (12134): Parameter "init_file" = "led_patterns.mif" Info (12134): Parameter "init_file" = "./rom/gw03.hex"
Info (12134): Parameter "intended_device_family" = "Cyclone IV E" Info (12134): Parameter "intended_device_family" = "Cyclone IV E"
Info (12134): Parameter "lpm_hint" = "ENABLE_RUNTIME_MOD=NO" Info (12134): Parameter "lpm_hint" = "ENABLE_RUNTIME_MOD=NO"
Info (12134): Parameter "lpm_type" = "altsyncram" Info (12134): Parameter "lpm_type" = "altsyncram"
Info (12134): Parameter "numwords_a" = "8" Info (12134): Parameter "numwords_a" = "16384"
Info (12134): Parameter "operation_mode" = "ROM" Info (12134): Parameter "operation_mode" = "ROM"
Info (12134): Parameter "outdata_aclr_a" = "NONE" Info (12134): Parameter "outdata_aclr_a" = "NONE"
Info (12134): Parameter "outdata_reg_a" = "CLOCK0" Info (12134): Parameter "outdata_reg_a" = "CLOCK0"
Info (12134): Parameter "widthad_a" = "3" Info (12134): Parameter "widthad_a" = "14"
Info (12134): Parameter "width_a" = "8" Info (12134): Parameter "width_a" = "8"
Info (12134): Parameter "width_byteena_a" = "1" Info (12134): Parameter "width_byteena_a" = "1"
Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_ro91.tdf Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_qh91.tdf
Info (12023): Found entity 1: altsyncram_ro91 Info (12023): Found entity 1: altsyncram_qh91
Info (12128): Elaborating entity "altsyncram_ro91" for hierarchy "rom0:rom|altsyncram:altsyncram_component|altsyncram_ro91:auto_generated" Info (12128): Elaborating entity "altsyncram_qh91" for hierarchy "rom0:rom|altsyncram:altsyncram_component|altsyncram_qh91:auto_generated"
Info (12021): Found 1 design units, including 1 entities, in source file db/decode_c8a.tdf
Info (12023): Found entity 1: decode_c8a
Info (12128): Elaborating entity "decode_c8a" for hierarchy "rom0:rom|altsyncram:altsyncram_component|altsyncram_qh91:auto_generated|decode_c8a:rden_decode"
Info (12021): Found 1 design units, including 1 entities, in source file db/mux_3nb.tdf
Info (12023): Found entity 1: mux_3nb
Info (12128): Elaborating entity "mux_3nb" for hierarchy "rom0:rom|altsyncram:altsyncram_component|altsyncram_qh91:auto_generated|mux_3nb:mux2"
Info (286030): Timing-Driven Synthesis is running Info (286030): Timing-Driven Synthesis is running
Info (16010): Generating hard_block partition "hard_block:auto_generated_inst" Info (16010): Generating hard_block partition "hard_block:auto_generated_inst"
Info (16011): Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL Info (16011): Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL
Info (21057): Implemented 71 device resources after synthesis - the final resource count might be different Info (21057): Implemented 79 device resources after synthesis - the final resource count might be different
Info (21058): Implemented 1 input pins Info (21058): Implemented 1 input pins
Info (21059): Implemented 8 output pins Info (21059): Implemented 8 output pins
Info (21061): Implemented 54 logic cells Info (21061): Implemented 54 logic cells
Info (21064): Implemented 8 RAM segments Info (21064): Implemented 16 RAM segments
Info: Quartus II 32-bit Analysis & Synthesis was successful. 0 errors, 3 warnings Info: Quartus II 32-bit Analysis & Synthesis was successful. 0 errors, 3 warnings
Info: Peak virtual memory: 384 megabytes Info: Peak virtual memory: 392 megabytes
Info: Processing ended: Wed Mar 30 12:38:28 2022 Info: Processing ended: Wed Mar 30 13:12:13 2022
Info: Elapsed time: 00:00:02 Info: Elapsed time: 00:00:02
Info: Total CPU time (on all processors): 00:00:01 Info: Total CPU time (on all processors): 00:00:02
output_files/spectrum.map.summary
+6 -6
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@@ -1,14 +1,14 @@
Analysis & Synthesis Status : Successful - Wed Mar 30 12:38:28 2022 Analysis & Synthesis Status : Successful - Wed Mar 30 13:12:13 2022
Quartus II 32-bit Version : 13.1.0 Build 162 10/23/2013 SJ Web Edition Quartus II 32-bit Version : 13.1.0 Build 162 10/23/2013 SJ Web Edition
Revision Name : spectrum Revision Name : spectrum
Top-level Entity Name : spectrum Top-level Entity Name : spectrum
Family : Cyclone IV E Family : Cyclone IV E
Total logic elements : 33 Total logic elements : 54
Total combinational functions : 33 Total combinational functions : 52
Dedicated logic registers : 24 Dedicated logic registers : 38
Total registers : 24 Total registers : 38
Total pins : 9 Total pins : 9
Total virtual pins : 0 Total virtual pins : 0
Total memory bits : 64 Total memory bits : 131,072
Embedded Multiplier 9-bit elements : 0 Embedded Multiplier 9-bit elements : 0
Total PLLs : 0 Total PLLs : 0
output_files/spectrum.sof
BIN
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Binary file not shown.
output_files/spectrum.sta.rpt
+6107 -6107
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File diff suppressed because it is too large Load Diff
output_files/spectrum.sta.summary
+12 -12
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@@ -3,39 +3,39 @@ TimeQuest Timing Analyzer Summary
------------------------------------------------------------ ------------------------------------------------------------
Type : Slow 1200mV 85C Model Setup 'CLOCK_50' Type : Slow 1200mV 85C Model Setup 'CLOCK_50'
Slack : -2.763 Slack : -1.788
TNS : -43.394 TNS : -88.557
Type : Slow 1200mV 85C Model Hold 'CLOCK_50' Type : Slow 1200mV 85C Model Hold 'CLOCK_50'
Slack : 0.343 Slack : 0.260
TNS : 0.000 TNS : 0.000
Type : Slow 1200mV 85C Model Minimum Pulse Width 'CLOCK_50' Type : Slow 1200mV 85C Model Minimum Pulse Width 'CLOCK_50'
Slack : -3.000 Slack : -3.000
TNS : -46.633 TNS : -110.836
Type : Slow 1200mV 0C Model Setup 'CLOCK_50' Type : Slow 1200mV 0C Model Setup 'CLOCK_50'
Slack : -2.331 Slack : -1.527
TNS : -34.994 TNS : -72.611
Type : Slow 1200mV 0C Model Hold 'CLOCK_50' Type : Slow 1200mV 0C Model Hold 'CLOCK_50'
Slack : 0.299 Slack : 0.255
TNS : 0.000 TNS : 0.000
Type : Slow 1200mV 0C Model Minimum Pulse Width 'CLOCK_50' Type : Slow 1200mV 0C Model Minimum Pulse Width 'CLOCK_50'
Slack : -3.000 Slack : -3.000
TNS : -46.624 TNS : -110.824
Type : Fast 1200mV 0C Model Setup 'CLOCK_50' Type : Fast 1200mV 0C Model Setup 'CLOCK_50'
Slack : -1.122 Slack : -0.529
TNS : -9.363 TNS : -18.538
Type : Fast 1200mV 0C Model Hold 'CLOCK_50' Type : Fast 1200mV 0C Model Hold 'CLOCK_50'
Slack : 0.178 Slack : 0.123
TNS : 0.000 TNS : 0.000
Type : Fast 1200mV 0C Model Minimum Pulse Width 'CLOCK_50' Type : Fast 1200mV 0C Model Minimum Pulse Width 'CLOCK_50'
Slack : -3.000 Slack : -3.000
TNS : -45.480 TNS : -93.684
------------------------------------------------------------ ------------------------------------------------------------
rom/gw03.hex
+514
View File
@@ -0,0 +1,514 @@
:020000040000FA
:20000000F3AF11FFFFC3CB112A5D5C225F5C1843C3F215AFC30A0C202A5D5C7ECD7D00D088
:20002000CD740018F7FFFFFFC35B333A385C0FC9C52A615CE5C39E16F5E52A785C232278DF
:200040005C7CB52003FD3440C5D5CDBF02D1C1E1F1FBC9E16EFD7500ED7B3D5CC3C516CD02
:20006000D416D21C12C9F5E5CD5F007CB52801E9E1F1ED452A5D5C23225D5C7EC9FE21D069
:20008000FE0DC8FE10D8FE183FD823FE1638012337225D5CC9BF524EC4494E4B4559A45075
:2000A000C946CE504F494ED453435245454EA4415454D241D45441C256414CA4434F44C5AC
:2000C0005641CC4C45CE5349CE434FD35441CE4153CE4143D34154CE4CCE4558D0494ED41E
:2000E0005351D25347CE4142D3504545CB49CE5553D2535452A4434852A44E4FD44249CEAE
:200100004FD2414EC43CBD3EBD3CBE4C494EC5544845CE54CF535445D04445462046CE4301
:2001200041D4464F524D41D44D4F56C545524153C54F50454E20A3434C4F534520A34D45FA
:200140005247C55645524946D9424545D0434952434CC5494ECB50415045D2464C4153C8D6
:200160004252494748D4494E56455253C54F5645D24F55D44C5052494ED44C4C4953D453BB
:20018000544FD0524541C4444154C1524553544F52C54E45D7424F524445D2434F4E5449ED
:2001A0004E55C54449CD5245CD464FD2474F2054CF474F205355C2494E5055D44C4F41C409
:2001C0004C4953D44C45D450415553C54E4558D4504F4BC55052494ED4504C4FD45255CE51
:2001E000534156C552414E444F4D495AC549C6434CD3445241D7434C4541D252455455528F
:20020000CE434F50D942485936355447564E4A5537345246434D4B4938334544580E4C4F0D
:20022000393257535A200D5030315141E3C4E0E4B4BCBDBBAFB0B1C0A7A6BEADB2BAE5A50E
:20024000C2E1B3B9C1B87EDCDA5CB77B7DD8BFAEAAABDDDEDF7FB5D67CD55DDBB6D95BD74F
:200260000C07060405080A0B090FE22A3FCDC8CCCB5EAC2D2B3D2E2C3B22C73CC33EC52F62
:20028000C960C63AD0CEA8CAD3D4D1D2A9CF2E2F11FFFF01FEFEED782FE61F280E677D1433
:2002A000C0D608CB3C30FA535F20F42DCB0038E67A3CC8FE28C8FE19C87B5A57FE18C9CD70
:2002C0008E02C021005CCB7E200723352B200236FF7D21045CBD20EECD1E03D021005CBE45
:2002E000282EEB21045CBE2827CB7E2004EBCB7EC85F77233605233A095C7723FD4E07FDE7
:200300005601E5CD3303E17732085CFDCB01EEC92336052335C03A0A5C77237E18EA4216A8
:20032000007BFE27D0FE182003CB78C0210502197E37C97BFE3A382F0DFA4F032803C3AA47
:200340000421EB010428032105021600197EC9212902CB4028F4CB5A280AFDCB305EC004DB
:20036000C0C620C9C6A5C9FE30D80DFA9D032019215402CB6828D3FE383007D62004C8C65A
:2003800008C9D63604C8C6FEC9213002FE3928BAFE3028B6E607C68004C8EE0FC904C8CB53
:2003A0006821300220A4D610FE222806FE20C03E5FC93E40C9F37DCB3DCB3D2FE6034F0612
:2003C00000DD21D103DD093A485CE6380F0F0FF608000000040C0D20FD0E3F05C2D603EE29
:2003E00010D3FE444FCB6720097AB32809794D1BDDE94D0CDDE9FBC9EF3127C00334EC6CB0
:20040000981FF504A10F3821925C7EA7205E234E234678179FB9205423BE205078C63CF2A0
:200420002504E26C0406FA04D60C30FBC60CC5216E04CD0634CDB433EF0438F18677EFC083
:20044000023138CD941EFE0B3022EFE004E0348043559F8001053435710338CD991EC5CD08
:20046000991EE150597AB3C81BC3B503CF0A8902D01286890A9760758912D5171F891B900B
:2004800041028924D053CA892E9D36B18938FF493E8943FF6A73894FA70054895C0000009D
:2004A000896914F6248976F11005C64FFEA5D8F1E1AF6F772E0477C9CD3025C8CB7EC0CFEC
:2004C0000B00213F05E521801FCB7F280321980C0813DD2BF33E024710FED3FEEE0F06A4AA
:2004E0002D20F50525F2D804062F10FED3FE3E0D063710FED3FE010E3B086FC307057AB38A
:20050000280CDD6E007CAD673E0137C325056C18F479CB7810FE3004064210FED3FE063E88
:2005200020EF05AF3CCB15C214051BDD2306313E7FDBFE1FD07A3CC2FE04063B10FEC9F5A3
:200540003A485CE6380F0F0FD3FE3E7FDBFE1FFB3802CF0CF1C9140815F33E0FD3FE213F80
:2005600005E5DBFE1FE620F6024FBFC0CDE70530FA21150410FE2B7CB520F9CDE30530EB5D
:20058000069CCDE30530E43EC6B830E02420F106C9CDE70530D578FED430F4CDE705D079F2
:2005A000EE034F260006B0181F082007300FDD7500180FCB11ADC0791F4F131807DD7E0044
:2005C000ADC0DD231B0806B22E01CDE305D03ECBB8CB1506B0D2CA057CAD677AB320CA7C04
:2005E000FE01C9CDE705D03E163D20FDA704C83E7FDBFE1FD0A9E62028F3792F4FE607F660
:2006000008D3FE37C9F13A745CD6E032745CCD8C1CCD3025283C0111003A745CA728020E58
:2006200022F7D5DDE1060B3E20121310FCDD3601FFCDF12B21F6FF0B0903300F3A745CA755
:200640002002CF0E78B1280A010A00DDE5E123EBEDB0DFFEE420493A745CFE03CA8A1CE75B
:20066000CDB228CBF9300B2100003A745C3D2815CF01C28A1CCDB8042818237EDD770B230B
:200680007EDD770C23DD710E3E01CB7128013CDD7700EBE7FE2920DAE7CDEE1BEBC35A070A
:2006A000FEAA201F3A745CFE03CA8A1CE7CDEE1BDD360B00DD360C1B210040DD750DDD74B2
:2006C0000E184DFEAF204F3A745CFE03CA8A1CE7CD4820200C3A745CA7CA8A1CCDE61C18C0
:2006E0000FCD821CDFFE2C280C3A745CA7CA8A1CCDE61C1804E7CD821CCDEE1BCD991EDDAE
:20070000710BDD700CCD991EDD710DDD700E6069DD3600031844FECA2809CDEE1BDD360E9F
:200720008018173A745CA7C28A1CE7CD821CCDEE1BCDB73CDD710DDD700EDD3600002A59BD
:200740005CED5B535C37ED52DD750BDD740C2A4B5CED52DD750FDD7410EB3A745CA7CA706E
:2007600009E5011100DD09DDE5111100AF37CD5605DDE130F23EFECD0116FD3652030E808B
:20078000DD7E00DDBEEF20020EF6FE0430D911C009C5CD0A0CC1DDE5D121F0FF19060A7EB6
:2007A0003C200379804F131ABE2320010CD710F6CB7920B33E0DD7E1DD7E00FE03280C3A96
:2007C000745C3DCA0808FE02CAB608E5DD6EFADD66FBDD5E0BDD560C7CB5280DED523826BA
:2007E0002807DD7E00FE03201DE17CB52006DD6E0DDD660EE5DDE13A745CFE02372001A7A4
:200800003EFFCD5605D8CF1ADD5E0BDD560CE57CB52006131313EB180CDD6EFADD66FBEB3B
:2008200037ED52380911050019444DCD051FE1DD7E00A7283E7CB528132B462B4E2B030380
:2008400003DD225F5CCDE819DD2A5F5C2A595C2BDD4E0BDD460CC5030303DD7EFDF5CD559F
:200860001623F177D12373237223E5DDE1373EFFC30208EB2A595C2BDD225F5CDD4E0BDD12
:20088000460CC5CDE519C1E5C5CD5516DD2A5F5C23DD4E0FDD461009224B5CDD660E7CE6FC
:2008A000C0200ADD6E0D22425CFD360A00D1DDE1373EFFC30208DD4E0BDD460CC503F736CF
:2008C00080EBD1E5E5DDE1373EFFCD0208E1ED5B535C7EE6C020191A13BE2320021ABE1BB1
:2008E0002B3008E5EBCDB819E118ECCD2C0918E27E4FFE80C8E52A4B5C7EFE802825B92853
:2009000008C5CDB819C1EB18F0E6E0FEA02012D1D5E523131ABE20061730F7E11803E11830
:20092000E03EFFD1EB3C37CD2C0918C4201008225F5CEBCDB819CDE819EB2A5F5C0808D56C
:20094000CDB819225F5C2A535CE3C50838072BCD5516231803CD551623C1D1ED53535CEDEA
:200960005B5F5CC5D5EBEDB0E1C1D5CDE819D1C9E53EFDCD0116AF11A109CD0A0CFDCB0245
:20098000EECDE73CDDE5111100AFCDC204DDE106327610FDDD5E0BDD560C3EFFDDE1C3C2D5
:2009A0000480537461727420746170652C207468656E20707265737320616E79206B6579C2
:2009C000AE0D50726F6772616D3AA00D4E756D6265722061727261793AA00D43686172612F
:2009E000637465722061727261793AA00D42797465733AA0CD030BFE20D2D90AFE063869EF
:200A0000FE183065210B0A5F1600195E19E5C3030B4E57102954535237504F5F5E5D5C5BBC
:200A20005A54530C3E22B92011FDCB014E2009040E023E19B82003050E21C3D90D3A915CD5
:200A4000F5FD3657013E20CDD90AF132915CC9FDCB014EC2CD0E0E21CD550C05C3D90DCDA3
:200A6000030B793D3DE610185A3E3F186C11870A320F5C180B116D0A180311870A320E5CC9
:200A80002A515C732372C911F409CD800A2A0E5C577DFE16DA11222029444A3E1F91380CB7
:200AA000C6024FFDCB014E20163E1690DA9F1E3C4704FDCB0246C2550CFDBE31DA860CC382
:200AC000D90D7CCD030B813DE61FC857FDCB01C63E20CD3B0C1520F8C9CD240BFDCB014EED
:200AE000201AFDCB02462008ED43885C22845CC9ED438A5CED43825C22865CC9FD714522DF
:200B0000805CC9FDCB014E2014ED4B885C2A845CFDCB0246C8ED4B8A5C2A865CC9FD4E4564
:200B20002A805CC9FE80383DFE90302647CD380BCD030B11925C184721925CCD3E0BCB1877
:200B40009FE60F4FCB189FE6F0B10E0477230D20FBC9D6A53009C615C5ED4B7B5C180BCDB9
:200B6000100CC3030BC5ED4B365CEB213B5CCB86FE202002CBC626006F29292909C1EB79F6
:200B80003D3E21200E054FFDCB014E2806D5CDCD0ED179B9D5CC550CD1C5E53A915C06FFC9
:200BA0001F3801041F1F9F4F3E08A7FDCB014E2805FDCB30CE37EB081AA0AEA91208381316
:200BC00014233D20F2EB25FDCB014ECCDB0BE1C10D23C9083E20835F0818E67C0F0F0FE63E
:200BE00003F65867ED5B8F5C7EABA2ABFDCB57762808E6C7CB572002EE38FDCB5766280803
:200C0000E6F8CB6F2002EE0777C9E52600E31804119500F5CD410C38093E20FDCB0146CC2C
:200C20003B0C1AE67FCD3B0C1A138730F5D1FE482803FE82D87AFE03D83E20D5D9D7D9D187
:200C4000C9F5EB3CCB7E2328FB3D20F8EBF1FE20D81AD641C9FDCB014EC011D90DD578FDE7
:200C6000CB0246C2020DFDBE31381BC0FDCB02662816FD5E2D1D285A3E00CD0116ED7B3F33
:200C80005CFDCB02A6C9CF04FD355220453E1890328C5C2A8F5CE53A915CF53EFDCD0116CE
:200CA000AF11F80CCD0A0CFDCB02EE213B5CCBDECBAE00CDE73C00FE202845FEE22841F641
:200CC00020FE6E283B3EFECD0116F132915CE1228F5CCDFE0DFD4631040E21C5CD9B0E7CD1
:200CE0000F0F0FE603F6586711E05A1A4E0620EB1271132310FAC1C9807363726F6C6CBF4A
:200D0000CF0CFE023880FD8631D619D0ED44C5472A8F5CE52A915CE5CD4D0D78F5216B5C1E
:200D200046783C7721895CBE3803340617CD000EF13D20E8E1FD7557E1228F5CED4B885C2D
:200D4000FDCB0286CDD90DFDCB02C6C1C9AF2A8D5CFDCB0246280467FD6E0E228F5C2191D9
:200D60005C20027E0FAEE655AE77C9CDAF0D213C5CCBAECBC6CD4D0DFD4631CD440E21C0AA
:200D80005A3A8D5C0518070E202B770D20FB10F7FD3631023EFDCD01162A515C11F409A7A2
:200DA0007323722311A8103F38F6012117182A210000227D5CFDCB3086CD940D3EFECD0145
:200DC00016CD4D0D0618CD440E2A515C11F409732372FD36520101211821005BFDCB014E59
:200DE000201278FDCB02462805FD8631D618C547CD9B0EC13E21915F160019C3DC0A0617E3
:200E0000CD9B0E0E08C5E578E60778200CEB21E0F819EB0120003DEDB0EB21E0FF19EB477A
:200E2000E6070F0F0F4F780600EDB0060709E6F820DBE124C10D20CDCD880E21E0FF19EB18
:200E4000EDB00601C5CD9B0E0E08C5E578E6070F0F0F4F7806000D545D360013EDB01101DE
:200E600007193DE6F84720E5E124C10D20DCCD880E626B133A8D5CFDCB024628033A485C9D
:200E8000770BEDB0C10E21C97C0F0F0F3DF65067EB61682929292929444DC93E1890570FC0
:200EA0000F0FE6E06F7AE618F64067C9F306B0210040E5C5CDF40EC1E1247CE607200A7DA8
:200EC000C6206F3F9FE6F8846710E7180DF321005B0608C5CDF40EC110F93E04D3FBFB21F3
:200EE000005BCD4D16AF47772310FCFDCB308E0E21C3D90D78FE039FE602D3FB57CD541F08
:200F0000380A3E04D3FBFBCDDF0ECF0CDBFB87F830EB0E205E230608CB12CB13CB1ADBFB4C
:200F20001F30FB7AD3FB10F00D20E9C92A3D5CE5217F10E5ED733D5CCDD415F51600FD5EEE
:200F4000FF21C800CDB503F121380FE5FE183031FE07382DFE10383A01020057FE16380CD3
:200F600003FDCB377ECA1E10CDD4155FCDD415D52A5B5CFDCB0786CD5516C12370237118EB
:200F80000AFDCB07862A5B5CCD52161213ED535B5CC95F160021990F195E19E52A5B5CC99A
:200FA00009666A50B5707ECFD42A495CFDCB376EC29710CD6E19CD95167AB3CA9710E523AB
:200FC0004E2346210A0009444DCD051FCD97102A515CE3E53EFFCD0116E12BFD350FCD60F6
:200FE00018FD340F2A595C23232323225B5CE1CD1516C9FDCB376E200821495CCD0F19184B
:201000006DFD360010181DCD31101805C3A73CC823225B5CC9CD3110010100C3E819CDD418
:2010200015CDD415E1E1E1223D5CFDCB007EC0F9C937CD9511ED521923C1D8C5444D626BDE
:20104000231AE6F0FE102009231AD617CE00200123A7ED4209EB38E6C9FDCB376EC02A49B9
:201060005CCD6E19EBCD9516214A5CCD1C19CD95173E00C30116FDCB377E28A8C3810FFD66
:20108000CB306628A1FD3600FF1600FD5EFE21901ACDB503C3300FE5CD90112BCDE51922C8
:2010A0005B5CFD360700E1C9FDCB025EC41D11A7FDCB016EC83A085CFDCB01AEF5FDCB0201
:2010C0006EC46E0DF1FE203052FE10302DFE06300A47E6014F781FC612182A2009216A5CEB
:2010E0003E08AE77180EFE0ED8D60D21415CBE7720023600FDCB02DEBFC947E6074F3E104C
:20110000CB5820013CFD71D3110D1118063A0D5C11A8102A4F5C232373237237C9CD4D0D0B
:20112000FDCB029EFDCB02AE2A8A5CE52A3D5CE5216711E5ED733D5C2A825CE537CD951124
:20114000EBCD7D18EBCDE1182A8A5CE3EBCD4D0D3A8B5C92382620067BFD9650301E3E204B
:20116000D5CDF409D118E91600FD5EFE21901ACDB503FD3600FFED5B8A5C1802D1E1E12210
:201180003D5CC1D5CDD90DE122825CFD362600C92A615C2BA7ED5B595CFDCB376EC8ED5B37
:2011A000615CD82A635CC97EFE0E010600CCE8197E23FE0D20F1C9F33EFFED5BB25CD9EDB8
:2011C0004BB45CED5B385C2A7B5CD9473E07D3FE3E3FED47000000000000626B36022BBC04
:2011E00020FAA7ED52192330063528033528F32BD9ED43B45CED53385C227B5CD90428199E
:2012000022B45C11AF3E01A800EBEDB8EB23227B5C2B014000ED43385C22B25C21003C227F
:20122000365C2AB25C363E2BF92B2B223D5CED56FD213A5CFB3A505CA73E21C21313180D50
:20124000CD8D2C410E00D0CBAFCBF9C90021B65C224F5C11AF15011500EBEDB0EB2B2257E0
:201260005C2322535C224B5C36802322595C3E38328D5C32485C21230522095CFD35C6FD79
:2012800035CA21C61511105C0E0EEDB0CDDF0EFD363102CD6B0D113815CD0A0CFDCB02EEBF
:2012A0001807FD363102CD9517CDB0163E00CD0116CD6E38CD171BFDCB007E2012FDCB3099
:2012C0006628402A595CCDA711FD3600FF18DDFD3607000000CDFB1978B1C25D15DFFE0D53
:2012E00028C0FDCB3046C4AF0DCD6E0D3E19FD964F328C5CFDCB01FEFD3600FFFD360A0176
:20130000CD8A1B76FDCB01AEFDCB304EC4CD0E3A3A5C3CF5210000FD7437FD7426220B5C9F
:2013200021010022165CCDB016FDCB37AECD6E0DFDCB02EEF147FE0A3802C607CDEF15C3DC
:20134000943C78119113CD0A0CAF113615CD0A0CED4B455CCD1B1A3E3AD7FD4E0D0600CD6A
:201360001B1ACD97103A3A5C3C281BFE092804FE152003FD340D01030011705C21445CCB61
:201380007E280109EDB8FD360AFFFDCB019EC3AC12804FCB4E45585420776974686F7574C7
:2013A00020464FD25661726961626C65206E6F7420666F756EE45375627363726970742074
:2013C00077726F6EE74F7574206F66206D656D6F72F94F7574206F66207363726565EE4E5F
:2013E000756D62657220746F6F206269E752455455524E20776974686F757420474F53551C
:20140000C2456E64206F662066696CE553544F502073746174656D656EF4496E76616C69A0
:201420006420617267756D656EF4496E7465676572206F7574206F662072616E67E54E6FA0
:201440006E73656E736520696E2042415349C3425245414B202D20434F4E54207265706535
:201460006174F34F7574206F6620444154C1496E76616C69642066696C65206E616DE54EA7
:201480006F20726F6F6D20666F72206C696EE553544F5020696E20494E5055D4464F5220DD
:2014A000776974686F7574204E4558D4496E76616C696420492F4F206465766963E5496EC4
:2014C00076616C696420636F6C6F75F2425245414B20696E746F2070726F677261ED52415E
:2014E0004D544F50206E6F20676F6FE453746174656D656E74206C6F73F4496E76616C69EC
:2015000064207374726561ED464E20776974686F7574204445C6506172616D657465722043
:201520006572726FF254617065206C6F6164696E67206572726FF22CA07F20313938322050
:2015400053696E636C616972205265736561726368204C74E43E10010000C31313ED434994
:201560005C2A5D5CEB215515E52A615C37ED52E56069CD6E192006CDB819CDE819C1793D69
:20158000B02828C5030303032BED5B535CD5CD5516E122535CC1C5132A615C2B2BEDB82AF4
:2015A000495CEBC1702B712B732B72F1C3A212F409A8104BF409C41553810FC41552F4094A
:2015C000C4155080CF12010006000B000100010006001000FDCB026E2004FDCB02DECDE6A0
:2015E00015D828FACF07D9E52A515C232318081E3083D9E52A515C5E2356EBCD2C16E1D91A
:20160000C987C6166F265C5E23567AB32002CF171B2A4F5C1922515CFDCB30A6232323239F
:201620004E212D16CDDC16D016005E19E94B065312501B00FDCB02C6FDCB01AEFDCB30E6ED
:201640001804FDCB0286FDCB018EC34D0DFDCB01CEC9010100E5CD051FE1CD64162A655C5F
:20166000EBEDB8C9F5E5214B5C3E0E5E2356E3A7ED5219E33009D5EB09EB722B7323D12373
:201680003D20E8EBD1F1A7ED52444D0319EBC90000EB118F167EE6C020F756235EC92A6308
:2016A0005C2BCD55162323C1ED43615CC1EB23C92A595C360D225B5C2336802322615C2ADF
:2016C000615C22635C2A635C22655CE521925C22685CE1C9CD2B002AB05CC9237EA7C8B95C
:2016E0002320F837C9CD1E17CDD53C01000011E2A3EB19380701D415094E2346EB7123705C
:20170000C9E52A4F5C092323234EEB21DE3CCDDC164E180209E9060038FA1809E1C9CD94E3
:201720001EFE103802CF17C6030721105C4F0600094E23462BC9EF0138CD1E1778B1281666
:20174000EB2A4F5C092323237EEBFE4B2808FE532804FE5020CFCD5D17732372C9E5CDF106
:201760002B78B12002CF0EC51AE6DF4F217A17CDDC1630F14E060009C1E94B065308500A84
:20178000001E0118061E0618021E100B78B120D557E1C91890ED733F5CFD360210CDAF0D05
:2017A000FDCB02C6FD4631CD440EFDCB0286FDCB30C62A495CED5B6C5CA7ED52193822D5EB
:2017C000CD6E1911C002EBED52E3CD6E19C1C5CDB819C109380EEB56235E2BED536C5C1840
:2017E000ED226C5C2A6C5CCD6E192801EBCD3318FDCB02A6C93E0318023E02FD360200CDCA
:201800003025C40116DFCD70203814DFFE3B2804FE2C2006E7CD821C1808CDE61C1803CD53
:20182000DE1CCDEE1BCDB73C78E63F676922495CCD6E191E01CD5518D7FDCB026628F63AD8
:201840006B5CFD964F20EEABC8E5D5216C5CCD0F19D1E118E0ED4B495CCD8019163E280558
:20186000110000CB13FD732D7EFE40C1D0C5CD281A232323FDCB01867AA72805D7FDCB0115
:20188000C6D5EBFDCB3096CD36391808CD991E6069C36E192A5F5CA7ED5220053E3FCDC146
:2018A00018CDE118EB7ECDB61823FE0D2806EBCD371918E0D1C9FE0EC02323232323237E34
:2018C000C9D92A8F5CE5CBBCCBFD228F5C21915C56D53600CDF409E1FD7457E1228F5CD967
:2018E000C92A5B5CA7ED52C03A415CCB072804C6431816213B5CCB9E3E4BCB56280BCBDEE5
:201900003CFDCB305E28023E43D5CDC118D1C95E2356E5EB23CD6E19CD9516E1FDCB376E91
:20192000C0722B73C97BA7F8180DAF093C38FCED423D28F1C3EF15CD1B2D3030FE21382C63
:20194000CD363900FECB2824FE3A200EFDCB376E2016FDCB30562814180EFE22200AF53A04
:201960006A5CEE04326A5CF1FDCB01D6D7C9E52A535C545DC1CD8019D0C5CDB819EB18F4C7
:201980007EB8C0237E2BB9C9232323225D5C0E0015C8E7BB2004A7C9237ECDB618225D5C87
:2019A000FE2220010DFE3A2804FECB2004CB4128DFFE0D20E31537C9E57EFE403817CB6F28
:2019C000281487FAC7193F01050030020E1217237E30FB180623234E23462309D1A7ED52F2
:2019E000444D19EBC9CDDD19C5782F47792F4F03CD6416EBE119D5EDB0E1C92A595C2B22A5
:201A00005D5CE721925C22655CCD3B2DCDA22D380421F0D809DA8A1CC3C516D5E5AFCB786B
:201A2000202060691EFF1808D556235EE5EB1E200118FCCD2A19019CFFCD2A190EF6CD2ADA
:201A4000197DCDEF15E1D1C9B1CBBCBFC4AFB493919295989898989898987F812E6C6E709B
:201A60004894563F412B171F3777440F592B432D513A6D420D495C44155D013D020600670F
:201A80001E06CB05F01C0600ED1E00243900231F043D06CC0605031D0400AB1D05CD1F0596
:201AA000892005022C05A73900B71103A11E05F9170800801E034F1E005F1E03AC1E006BFB
:201AC0000D0900DC2206003A1F05ED1D05271E03421E0905822300AC0E05C91F05F5170B61
:201AE0000B0B0B0800F8030905202307070707070708007A1E0600942205601F062C0A002B
:201B000036170600E5160A0093170A2C0A0093170A009317009317FDCB01BECDFB19AF3232
:201B2000475C3D323A5C1801E7CDBF16FD340DFA8A1CDF0600FE0D287AFE3A28EB21761BEE
:201B4000E54FE779D6CEDA8A1C4F21481A094E0918032A745C7E2322745C01521BC54FFE73
:201B600020300C21011C0600094E09E5DF05C9DFB9C28A1CE7C9CD541F3802CF14FDCB0AF4
:201B80007E20712A425CCB7C281421FEFF22455C2A615C2BED5B595C1B3A445C1833CD6E80
:201BA000193A445C2819A72043477EE6C078280FCFFFC1CD3025C82A555C3EC0A6C0AFFE68
:201BC00001CE0056235EED53455C235E2356EB192322555CEB225D5C571E00FD360AFF15FE
:201BE000FD720DCA281B14CD8B192808CF16CD3025C0C1C1DFFE0D28BAFE3ACA281BC38A00
:201C00001C0F1D4B09670B7B8E71B481CFCDDE1CBFC1CCEE1BEB2A745C4E2346EBC5C9CD3A
:201C2000B228FD3637003008FDCB37CE2018CF01CC9629FDCB0176200DAFCD3025C4F12BAB
:201C400021715CB677EBED43725C224D5CC9C1CD561CCDEE1BC93A3B5CF5CDFB24F1FD5657
:201C600001AAE6402024CB7AC2FF2AC9CDB228F579F69F3C2014F118A9E7CD821CFE2C20EE
:201C800009E7CDFB24FDCB0176C0CF0BCDFB24FDCB0176C818F4FDCB017E003EFEC4011632
:201CA00000F13A745CD613CDFC21CDEE1B2A8F5C228D5C21915C7E07AEE6AAAE77C9CD30A4
:201CC000252813003EFECD01160021905C7EF6F877FDCB57B6DFCDE221189FC30506FE0D80
:201CE0002804FE3A209CCD3025C8EFA038C9CF08C1CD3025280AEF0238EBCDE934DAB31BB8
:201D0000C3291BFECD2009E7CD821CCDEE1B1806CDEE1BEFA138EFC00201E00138CDFF2A23
:201D200022685C2B7ECBFE010600090738060E0DCD551623E5EF020238E1EB0E0AEDB02AC5
:201D4000455CEB732372FD560D142372CDDA1DD0FD46382A455C22425C3A475CED44572ABD
:201D60005D5C1EF3C5ED4B555CCD861DED43555CC13811E7F620B82803E718E8E73E019211
:201D800032445CC9CF117EFE3A2818237EE6C037C046234EED43425C234E2346E509444DB6
:201DA000E11600C5CD8B19C1D018E0FDCB374EC22E1C2A4D5CCB7E281F2322685CEFE0E2F7
:201DC0000FC00238CDDA1DD82A685C110F00195E23562366EBC3731ECF00EFE1E0E2360001
:201DE00002010337000438A7C93837C9E7CD1F1CCD30252829DF225F5C2A575C7EFE2C28F7
:201E0000091EE4CD861D3002CF0DCD7700CD561CDF22575C2A5F5CFD362600CD7800DFFEA2
:201E20002C28C9CDEE1BC9CD3025200BCDFB24FE2CC4EE1BE718F53EE447EDB9110002C3DD
:201E40008B19CDB73C6069CD6E192B22575CC9CD991E78B12004ED4B785CED43765CC92A66
:201E60006E5CFD5636180CCDB73C606916007CFEF0302C22425CFD720AC9CD851EED79C9E5
:201E8000CD851E02C9CDD52D38152802ED44F5CD991EF1C9CDD52D1803CDA22D3801C8CF07
:201EA0000ACD671E010000CD451E1803CD991E78B12004ED4BB25CC5ED5B4B5C2A595C2BA5
:201EC000CDE519CD6B0D2A655C11320019D1ED5230082AB45CA7ED523002CF15EB22B25C12
:201EE000D1C1363E2BF9C5ED733D5CEBE9D1FD660D24E333ED4B455CC5E5ED733D5CD5CD8D
:201F0000671E0114002A655C09380AEB215000193803ED72D82E03C35500010000CD051FCF
:201F2000444DC9C1E1D17AFE3E280B3BE3EBED733D5CC5C3731ED5E5CF06CD991E760B78C4
:201F4000B1280C78A13C200103FDCB016E28EEFDCB01AEC93E7FDBFE1FD83EFEDBFE1FC90C
:201F6000CD302528053ECEC3391EFDCB01F6CD8D2C3016E7FE242005FDCB01B6E7FE282087
:201F80003CE7FE292820CD8D2CD28A1CEBE7FE242002EBE7EB010600CD55162323360EFE17
:201FA0002C2003E718E0FE292013E7FE3D200EE73A3B5CF5CDFB24F1FDAE01E640C28A1C85
:201FC000CDEE1BCD3025E1C8E93E0318023E02CD3025C40116CD4D0DCDDF1FCDEE1BC9DF6F
:201FE000CD4520280DCD4E2028FBCDFC1FCD4E2028F3FE29C8CDC31F3E0DD7C9DFFEAC20AC
:202000000DCD791CCDC31FCD07233E161810FEAD2012E7CD821CCDC31FCD991E3E17D77928
:20202000D778D7C9CDF221D0CD7020D0CDFB24CDC31FFDCB0176CCF12BC2E32D78B10BC844
:202040001A13D718F7FE29C8FE0DC8FE3AC9DFFE3B2814FE2C200ACD3025280B3E06D7187A
:2020600006FE27C0CDF51FE7CD45202001C1BFC9FE2337C0E7CD821CA7CDC31FCD941EFED4
:2020800010D20E16CD0116A7C9CD30252808CD6E0D3E01CD0116FD360201CDC120CDEE1B6F
:2020A000ED4B885C3A6B5CB838030E2147ED43885C3E1990328C5CFDCB0286CDD90DC36E51
:2020C0000DCD4E2028FBFE28200EE7CDDF1FDFFE29C28A1CE7C3B221FECA2011E7CD1F1CBC
:2020E000FDCB37FEFDCB0176C28A1C180DCD8D2CD2AF21CD1F1CFDCB37BECD3025CAB2216B
:20210000CDBF1621715CCBB6CBEE010100CB7E200B3A3B5CE64020020E03B677F7360D7975
:202120000F0F30053E22122B77225B5CFDCB377E202C2A5D5CE52A3D5CE5213A21E5FDCBFD
:2021400030662804ED733D5C2A615CCDA711FD3600FFCD2C0FFDCB01BECDB9211803CD2CDC
:202160000FFD362200CDD621200ACD1D11ED4B825CCDD90D21715CCBAECB7ECBBE201CE1F3
:20218000E1223D5CE1225F5CFDCB01FECDB9212A5F5CFD362600225D5C18172A635CED5BFE
:2021A000615C37ED52444DCDB22ACDFF2A1803CDFC1FCD4E20CAC120C92A615C225D5CDF69
:2021C000FEE2280C3A715CCD591CDFFE0DC8CF0BCD3025C8CF102A515C232323237EFE4B23
:2021E000C9E7CDF221D8DFFE2C28F6FE3B28F2C38A1CFED9D8FEDF3FD8F5E7F1D6C9F5CDC3
:20220000821CF1A7CDC31FF5CD941E57F1D77AD7C9D611CE00281DD602CE002856FE017A95
:2022200006012004070706044F7AFE0230167921915C18387A0607380507070706384F7A95
:20224000FE0A3802CF13218F5CFE08380B7E2807B02FE6242801784F79CD6C223E07BA9F0D
:20226000CD6C220707E650473E08BA9FAEA0AE772378C99F7A0F068020030F06404F7AFE15
:20228000082804FE0230BD79218F5CCD6C22790F0F0F18D8CD941EFE0830A9D3FE07070763
:2022A000CB6F2002EE0732485CC93EAF90DAF92447A71F371FA71FA8E6F8A867790707076E
:2022C000A8E6C7A807076F79E607C9CDCD3CCDAA2247047E0710FDE601C3282DCDCD3CCD67
:2022E000E522C34D0DED437D5CCDAA2247043EFE0F10FD477EFD4E57CB412001A0CB512005
:2023000002A82F77C3DB0BCD142347C5CD142359C1514FC9CDD52DDAF9240E01C80EFFC9BA
:20232000DFFE2CC28A1CE7CD821CCDEE1BEF2A3D387EFE813005EF023818A1EFA3383683DF
:20234000EFC50238CD7D24C5EF31E104387EFE803008EF020238C1C3DC22EFC201C00203C7
:2023600001E00FC00131E00131E0A0C10238FD3462CD941E6FE5CD941EE167227D5CC1C342
:202380002024DFFE2C2806CDEE1BC37724E7CD821CCDEE1BEFC5A2041F313030000602381C
:2023A000C37724C002C102312AE101E12A0FE0052AE0013D387EFE813007EF020238C377E5
:2023C00024CD7D24C5EF02E10105C1020131E104C2020131E104E2E5E003A204311FC502B2
:2023E00020C002C202C1E504E0E2040FE101C102E004E2E50403C22AE12A0F02381AFE8188
:20240000C1DA7724C5EF01383A7D5CCD282DEFC00F01383A7E5CCD282DEFC50FE0E538C1B6
:2024200005283C1814EFE131E304E2E40403C102E404E2E3040FC20238C5EFC002E10F313C
:20244000383A7D5CCD282DEF03E0E20FC001E0383A7E5CCD282DEF0338CDB724C110C6EFE5
:20246000020201383A7D5CCD282DEF0301383A7E5CCD282DEF0338CDB724C34D0DEF312852
:202480003432000105E501052A38CDD52D3806E6FCC60430023EFCF5CD282DEFE50105313C
:2024A0001FC40231A2041FC101C0023104310FA1031BC30238C1C9CD072379B8300669D566
:2024C000AF5F1807B1C86841D5160060781F853803BC3807944FD9C1C518044FD5D9C12ACA
:2024E0007D5C788447793C85380D280D3D4FCDE522D97910D9D1C928F3CF0ADF0600C54FEA
:20250000219625CDDC1679D2842606004E09E9CD740003FE0DCA8A1CFE2220F3CD7400FEB4
:2025200022C9E7FE282006CD791CDFFE29C28A1CFDCB017EC9CDBF3C2A365C110001197975
:202540000F0F0FE6E0A85F79E618EE40570660C5D5E51AAE28043C201A3D4F060714231A4C
:20256000AEA9200F10F7C1C1C13E8090010100F712180AE111080019D1C110D348C9000077
:20258000CDBF3C790F0F0F4FE6E0A86F79E603EE58677EC3282D221C284F2EF22B12A856EC
:2025A000A557A784A68FC4E6AABFABC7A9CE00E7C3FF24DF23E5010000CD0F25201BCD0FF6
:2025C0002528FBCD30252811F7E1D57E231213FE2220F87E23FE2228F20BD1213B5CCBB6BD
:2025E000CB7EC4B22AC31227E7CDFB24FE29C28A1CE7C31227C3BD27CD30252828ED4B76EA
:202600005CCD2B2DEFA10F343716043480410000803202A1033138CDA22DED43765C7EA79C
:202620002803D610771809CD30252804EFA33834E7C3C326015A10E7FE23CA0D27213B5CE9
:20264000CBB6CB7E281FCD8E020E002013CD1E03300E155FCD3303F5010100F7F1120E0128
:202660000600CDB22AC31227CD2225C43525E7C3DB25CD2225C48025E71848CD2225C4CB6C
:2026800022E7183FCD882C3056FE41303CCD30252023CD9B2CDF010600CD551623360E2387
:2026A000EB2A655C0E05A7ED4222655CEDB0EB2BCD7700180EDF237EFE0E20FA23CDB433DE
:2026C000225D5CFDCB01F61814CDB228DA2E1CCC96293A3B5CFEC0380423CDB433183301F0
:2026E000DB09FE2D2827011810FEAE2820D6AFDA8A1C01F004FE142814D28A1C0610C6DCE7
:202700004FFEDF3002CBB1FEEE3802CBB9C5E7C3FF24DFFE28200CFDCB01762017CD522AB3
:20272000E718F006004F219527CDDC1630064E21ED260946D17AB8383AA7CA1800C5213B93
:202740005C7BFEED2006CB7620021E99D5CD302528097BE63F47EF3B3818097BFDAE01E6D8
:2027600040C28A1CD1213B5CCBF6CB7B2002CBB6C118C1D579FDCB01762015E63FC6084FE0
:20278000FE102004CBF1180838D7FE172802CBF9C5E7C3FF242BCF2DC32AC42FC55EC63D5A
:2027A000CE3ECC3CCDC7C9C8CAC9CBC5C7C6C8000608080A020305050505050506CD3025FD
:2027C0002035E7CD8D2CD28A1CE7FE24F52001E7FE282012E7FE292810CDFB24DFFE2C2006
:2027E00003E718F5FE29C28A1CE7213B5CCBB6F12802CBF6C31227E7E6DF47E7D6244F2018
:2028000001E7E7E52A535C2B11CE00C5CD861DC13002CF18E5CDAB28E6DFB82008CDAB2848
:20282000D624B9280CE12B110002C5CD8B19C118D7A7CCAB28D1D1ED535D5CCDAB28E5FE48
:20284000292842237EFE0E164028072BCDAB2823160023E5D5CDFB24F1FDAE01E640202BD8
:20286000E1EB2A655C010500ED4222655CEDB0EB2BCDAB28FE29280DE5DFFE2C200DE7E1F7
:20288000CDAB2818BEE5DFFE292802CF19D1EB225D5C2A0B5CE3220B5CD5E7E7CDFB24E1C1
:2028A000225D5CE1220B5CE7C31227237EFE2138FAC9FDCB01F6DFCD8D2CD28A1CE5E61FAF
:2028C0004FE7E5FE282828CBF1FE242811CBE9CD882C300FCD882C3016CBB1E718F6E7FDC0
:2028E000CB01B63A0C5CA72806CD3025C2512941CD3025200879E6E0CBFF4F18372A4B5C7E
:202900007EE67F282DB920221787F23F293830D1D5E5231A13FE2028FAF620BE28F4F680A3
:20292000BE20061ACD882C3015E1C5CDB819EBC118CECBF8D1DFFE282809CBE8180DD1D1B9
:20294000D1E5DFCD882C3003E718F8E1CB10CB70C92A0B5C7EFE29CAEF287EF66047237EA4
:20296000FE0E28072BCDAB2823CBA878B928122323232323CDAB28FE29CAEF28CDAB281841
:20298000D9CB69200C23ED5B655CCDC033EB22655CD1D1AF3CC9AF47CB79204BCB7E200ED2
:2029A0003C234E234623EBCDB22ADFC3492A23232346CB71280A0528E8EBDFFE282061EBA7
:2029C000EB1824E5DFE1FE2C2820CB792852CB712006FE29203CE7C9FE29286CFECC20328F
:2029E000DF2B225D5C185E210000E5E7E179FEC02009DFFE292851FECC28E5C5E5CDEE2A69
:202A0000E3EBCDCC2A38190BCDF42A09D1C110B3CB792066E5CB712013424BDFFE292802A5
:202A2000CF02E7E1110500CDF42A09C9CDEE2AE3CDF42AC10923424BEBCDB12ADFFE29283C
:202A400007FE2C20DBCD522AE7FE2828F8FDCB01B6C9CD3025C4F12BE7FE292850D5AFF58B
:202A6000C5110100DFE1FECC2817F1CDCD2AF55059E5DFE1FECC2809FE29C28A1C626B184F
:202A800013E5E7E1FE29280CF1CDCD2AF5DF6069FE2920E6F1E3192BE3A7ED520100003882
:202AA0000723A7FA202A444DD1FDCB01B6CD3025C8AFFDCB01B6C5CDA933C12A655C772354
:202AC000732372237123702322655CC9AFD5E5F5CD821CF1CD30252812F5CD991ED178B16F
:202AE000372805E1E5A7ED427ADE00E1D1C9EB235E2356C9CD3025C8CDA930DA151FC92AC4
:202B00004D5CFDCB374E285E01050003237EFE2028FA300BFE103811FE16300D2318EDCD77
:202B2000882C38E7FE24CAC02B792A595C2BCD55162323EBD52A4D5C1BD606472811237E3F
:202B4000FE2138FAF620131210F4F680123EC02A4D5CAEF620E1CDEA2BE5EF0238E1010510
:202B600000A7ED421840FDCB017628061106001918E72A4D5CED4B725CFDCB3746203078A5
:202B8000B1C8E5F7D5C5545D233620EDB8E5CDF12BE1E3A7ED42093002444DE3EB78B12824
:202BA00002EDB0C1D1E1EB78B1C8D5EDB0E1C92B2B2B7EE5C5CDC62BC1E1030303C3E81935
:202BC0003EDF2A4D5CA6F5CDF12BEB09C52B224D5C0303032A595C2BCD55162A4D5CC1C52E
:202BE00003EDB8EB23C1702B71F12B772A595C2BC92A655C2B462B4E2B562B5E2B7E2265DD
:202C00005CC9CDB228C28A1CCD30252008CBB1CD9629CDEE1B3808C5CDB819CDE819C1CB5B
:202C2000F90600C5210100CB7120022E05EBE726FFCDCC2ADA202AE1C524E56069CDF42ADC
:202C4000EBDFFE2C28E8FE2920BBE7C17968260023232919DA151FD5C5E5444D2A595C2B0F
:202C6000CD55162377C10B0B0B23712370C1782377626B1B3600CB7128023620C1EDB8C1A5
:202C8000702B712B3D20F8C9CD1B2D3FD8FE413FD0FE5BD8FE613FD0FE7BC9FEC420191178
:202CA0000000E7D631CE00200AEB3FED6ADAAD31EB18EF424BC32B2DFE2E280FCD3B2DFEC5
:202CC0002E2028E7CD1B2D3822180AE7CD1B2DDA8A1CEFA038EFA1C00238DFCD222D380BFB
:202CE000EFE0A404C0050F38E718EFFE452803FE65C006FFE7FE2B2805FE2D200204E7CD8B
:202D00001B2D38CBC5CD3B2DCDD52DC1DAAD31A7FAAD31042802ED4418357EFE30D8FE3A3F
:202D20003FC9CD1B2DD8D6304F0600FD213A5CAF5F514847CDB62AEF38A7C9F5EFA038F1B0
:202D4000CD222DD8EF01A4040F38CD740018F1070F30022F3CF521925CCD0B35EFA438F1D6
:202D6000CB3F300DF5EFC1E0000404330205E138F12808F5EF310438F118E5EF0238C923B7
:202D80004E237EA9915F237E89A957C90E00E536002371237BA99177237A89A9772336000D
:202DA000E1C9EF387EA72805EFA20F2738EF0238E5D5EB46CD7F2DAF90CB79424B7BD1E127
:202DC000C957179F5F4FAF47CDB62AEF34EF1A209A85042738CDA22DD8F505042803F13739
:202DE000C9F1C9EF3136000B3137000D02383E30D7C92A383E2DD7EFA0C3C4C50238D9E5BB
:202E0000D9EF3127C203E201C202387EA72047CD7F2D06107AA72006B32809530608D5D999
:202E2000D1D91857EF02E2387ED67ECDC12D573AAC5C9232AC5C7ACD4F2DEF3127C103E1CD
:202E400038CDD52DE532A15C3D179F3C21AB5C77238677E11879D680FE1C3813CDC12DD6AB
:202E6000074721AC5C867778ED44CD4F2D1892EBCDBA2FD9CBFA7DD9D68047CB23CB12D96C
:202E8000CB13CB12D921AA5C0E057E8F27772B0D20F810E7AF21A65C11A15C0609ED6F0E19
:202EA000FFED6F20040D0C200A1213FD3471FD34720E00CB4028012310E73AAB5CD6093832
:202EC0000AFD35713E04FDBE6F1841EF02E238EBCDBA2FD93E80952E00CBFAD9CDDD2FFD06
:202EE0007E71FE083806D9CB12D918200100027BCD8B2F5F7ACD8B2F57C5D9C110F121A1FA
:202F00005C79FD4E710977FD347118D3F521A15CFD4E7106000941F12B7ECE0077A7280541
:202F2000FE0A3F300810F1360104FD3472FD7071EF0238D9E1D9ED4BAB5C21A15C78FE09BD
:202F40003804FEFC3826A7CCEF15AF90FA522F47180C79A728037E230DCDEF1510F479A753
:202F6000C8043E2ED73E3010FB4118E650150601CD4A2F3E45D74A79A7F2832FED444F3EB2
:202F80002D18023E2BD70600C31B1AD56F26005D542929192959194C7DD1C97E3600A7C805
:202FA00023CB7ECBFE2BC8C501050009414F372B7E2FCE007710F879C1C9E5F54E2346771E
:202FC00023794EC5234E2346EB575ED52356235ED5D9D1E1C1D92356235EF1E1C9A7C8FEFD
:202FE000213016C547D9CB2DCB1ACB1BD9CB1ACB1B10F2C1D0CD0430C0D9AF2E00575DD987
:20300000110000C91CC014C0D91C200114D9C9EBCD6E34EB1AB62026D523E5235E23562305
:2030200023237E234E2346E1EB09EB8E0FCE00C3253277237323722B2B2BD1C92BD1CD9394
:2030400032D9E5D9D5E5CD9B2F47EBCD9B2F4FB830037841EBF590CDBA2FCDDD2FF1E17752
:20306000E5686119D9EBED4AEB7C8D6F1FADD9EBE11F30083E01CDDD2F342823D97DE68010
:20308000D923772B281F7BED443F5F7A2FCE0057D97B2FCE005F7A2FCE0030071FD934CADF
:2030A000AD31D957D9AFC35531C506107C4D21000029380ACB1117300319380210F3C1C9FB
:2030C000CDE934D823AECBFE2BC91AB62022D5E5D5CD7F2DEBE341CD7F2D78A94FE1CDA937
:2030E00030EBE1380A7AB320014FCD8E2DD1C9D1CD9332AFCDC030D8D9E5D9D5EBCDC03018
:20310000EB385AE5CDBA2F78A7ED62D9E5ED62D906211811300519D9ED5AD9D9CB1CCB1D04
:20312000D9CB1CCB1DD9CB18CB19D9CB191F10E4EBD9EBD9C1E178812001A73D3F173F1F9B
:20314000F246313068A73C20083806D9CB7AD9205C77D978D930157EA73E802801AFD9A296
:20316000CDFB2F0777382E23772B18290620D9CB7AD9201207CB13CB12D9CB13CB12D935BB
:2031800028D710EA18D717300CCD04302007D91680D9342818E523D9D5D9C17817CB161F31
:2031A00077237123722373E1D1D9E1D9C9CF05CD9332EBAFCDC03038F4EBCDC030D8D9E5A4
:2031C000D9D5E5CDBA2FD9E56069D96168AF06DF181017CB11D9CB11CB10D929D9ED6AD933
:2031E0003810ED52D9ED52D9300F19D9ED5AD9A71808A7ED52D9ED52D93704FAD231F52813
:20320000E15F51D95950F1CB18F1CB18D9C1E17891C33D317EA7C8FE81300636003E2018F0
:2032200051FE91181AC23C309F4F3CB3B27920062B369123E680C3323023234E2346C9308A
:203240002CD52FC6912356235E2B2B0E00CB7A28010DCBFA0608908038045A1600902807C0
:2032600047CB3ACB1B10FACD8E2DD1C97ED6A0F0ED44D5EB2B47CB38CB38CB38280536003D
:203280002B10FBE6072809473EFFCB2710FCA677EBD1C9CD9632EB7EA7C0D5CD7F2DAF2331
:2032A000772B7706917AA72008B342281053580689EB052930FCCB09CB1CCB1DEB2B732B12
:2032C000722B70D1C900B00040B000013000F1490FDAA240B0000A8F363C34A1330F30CAA5
:2032E00030AF3151381B3524353B353B353B353B353B353B3514302D353B353B353B353BBB
:20330000353B353B359C35DE35BC3445366E346936DE357436B537AA37DA3733384338E2A5
:20332000371337C436AF364A3892346A34AC34A534B3341F36C9350135C033A0368636C6D3
:20334000337A360635F9349B3683371432A2334F2D973249341B342D340F34CDBF3578325C
:20336000675CD9E3D9ED53655CD97E23E5A7F2803357E6600F0F0F0FC67C6F7AE61F180E1A
:20338000FE183008D901FBFF545D09D9076F11D7322600195E2356216533E3D5D9ED4B66EA
:2033A0005CC9F13A675CD918C3D5E5010500CD051FE1D1C9ED5B655CCDC033ED53655CC987
:2033C000CDA933EDB0C9626BCDA933D9E5D9E3C57EE6C007074F0C7EE63F2002237EC65020
:2033E000123E059123130600EDB0C1E3D9E1D947AF05C8121318FAA7C8F5D5000000CDC80F
:2034000033D1F13D18F24F0707814F060009C9D52A685CCD0634CDC033E1C9626BD9E5218B
:20342000C532D9CDF733CDC833D9E1D9C9E5EB2A685CCD0634EBCDC033EBE1C906051A4E29
:20344000EB1271231310F7EBC947CD5E33310FC002A0C231E004E2C10338CDC633CD6233E9
:203460000F01C20235EEE10338C906FF1806CDE934D806007EA7280B2378E680B6173F1F01
:20348000772BC9D5E5CD7F2DE178B12F4FCD8E2DD1C9CDE934D8D511010023CB162B9F4F1E
:2034A000CD8E2DD1C9CD991EED781804CD991E0AC3282DCD991E212B2DE5C5C9CDF12B0BDB
:2034C00078B120231ACD8D2C3809D6903819FE1530153C3D878787FEA8300CED4B7B5C8110
:2034E0004F300104C32B2DCF09E5C5477E23B623B623B678C1E1C037C9CDE934D83EFF186A
:2035000006CDE9341805AF23AE2B07E53E007723772317771F23772377E1C9EBCDE934EB4A
:20352000D83718E7EBCDE934EBD0A718DEEBCDE934EBD0D51BAF121B12D1C978D608CB57D0
:2035400020013D0F3008F5E5CD3C34D1EBF1CB5720070FF5CD0F3018330FF5CDF12BD5C5D7
:20356000CDF12BE17CB5E378200BB1C12804F13F1816F11813B1280D1A96380920ED0B13B0
:2035800023E32B18DFC1F1A7F5EFA038F1F5DC0135F1F5D4F934F10FD40135C9CDF12BD57E
:2035A000C5CDF12BE1E5D5C509444DF7CDB22AC1E178B12802EDB0C1E178B12802EDB02A75
:2035C000655C11FBFFE519D1C9CDD52D380E200CF5010100F7F112CDB22AEBC9CF0A2A5D98
:2035E0005CE578C6E39FF5CDF12BD503F7E1ED535D5CD5EDB0EB2B360DFDCB01BECDFB2405
:20360000DFFE0D2007E1F1FDAE01E640C28A1C225D5CFDCB01FECDFB24E1225D5C18A0018A
:203620000100F7225B5CE52A515CE53EFFCD0116CDE32DE1CD1516D12A5B5CA7ED52444D18
:20364000CDB22AEBC9CD941EFE10D29F1E2A515CE5CD0116CDE61501000030030CF712CD73
:20366000B22AE1CD1516C3BF35CDF12B78B128011AC3282DCDF12BC32B2DD9E521675C3596
:20368000E1200423D9C9D95E7B179F5719D9C913131A1B1BA720EFD923D9C9F1D9E3D9C9CD
:2036A000EFC00231E00527E001C00403E038C9EF313600043A38C9313AC003E001300003BC
:2036C000A10338C9EF3D34F138AA3B29043127C303310FA1038813365865669D786540A258
:2036E0006032C9E721F7AF24EB2FB0B014EE7EBB9458F13A7EF8CFE338CDD52D2007380340
:20370000863009CF053807963004ED4477C9EF02A038C9EF3D3137000438CF09A002387E0A
:203720003680CD282DEF34380003013134F04CCCCCCD0337000801A103013834EF0134F0E4
:20374000317217F80401A203A2033134322004A2038C11AC140956DAA55930C55C90AA9E4B
:20376000706F61A1CBDA96A4319FB4E7A0FE5CFCEA1B43CA36EDA79C7E5EF06E238093043C
:203780000F38C9EF3D34EE22F9836E0431A20F2703310F310F312AA1033137C000040238CA
:2037A000C9A103013600021B38C9EF392AA103E000061B3303EF39313104310FA10386140E
:2037C000E65C1F0BA38F38EEE91563BB23EE920DCDEDF1235D1BEA0438C9EF311F012005BF
:2037E00038C9CD97327EFE81380EEFA11B01053136A30100061B3303EFA001313104310FA6
:20380000A1038C10B2130E55E48D5839BC5B98FD9E003675A0DBE8B46342C4E6B50936BE31
:20382000E936731B5DECD8DE63BEF061A1B30C040F38C9EF313104A1031B28A10F052431B0
:203840000F38C9EF22A3031B38C9EF3130001EA238EF0131300007250438C3C43602313064
:203860000009A001370006A1010502A138C9FDCB029ECD36392D36FFCD2C0FFDCB306EC0E2
:2038800011A601AFD5DDE12A595CF5010000DDE5D17EFE0D2875FEEA2871FE2220010CCB07
:2038A00041200ECD40123004CB782005EBBEEB28032318DD22AC5C237ECD4012080813EB0F
:2038C000BEEB28F3081AFE2028F308FE2E280BEBF680BEEB20B8FEC03810237EFE20280A89
:2038E0002BFE2428A9CD8D2C38A4ED5BAC5C1B1AFE2028FA13CDE519F1DDE5D1180300FF07
:20390000FFCB6AC077A7208236EAF5110102F1D601380EFEA4C8DDE5E12B2BCB7E28FB23CA
:20392000EBC38438FDCB0C7E280A216A5C7EEE2077CD3639CF08213B5CCBDECBD6FDCB30A2
:203940006EC8FDCB376EC0CB9ECB96C914012053747265616D7306467265653AA0061400E1
:203960008D52454D20434F4D4D414E44D38656312E33B28653545245414DD344454C455431
:2039800045A052454E554D4245D208084E4D49A02073746172742073746570202066697223
:2039A0007374206C617374FDCB0C7E2A655CE5283D2A595C7EFEEA203536E43EA711823960
:2039C000CD84382030CDAF0DAF116039F5CD0A0CF1F5FE05380F119B39010C0028040E17E1
:2039E0001E90CD3C203E0DD7F13CFE0720DBE122655CC3B21B08CD7700CDAF0DDF1802FF80
:203A0000FFFE0D280DCD1B2D38BBD5CD3B2DD11418EA08FEA63821207B151520A8CD8C186B
:203A200020A3CDB819D5CD8C18EBE12098A7ED52193892CDE51918B6114B39CD1300117EF5
:203A4000002A655C19ED727D2F6F7C2F67FEF0300322945C21975C22655CCDE32D115C3929
:203A6000CD13003EFD21105CA7F5E54F20033E0DD73E0DCD852F3E06D7E14E2C462C78B1AC
:203A8000280ADD2A4F5CDD09DD7E03D7F13CFE1020D618A27AFE04281C3090FE02280D3057
:203AA0000EA72005EFA4310438EFA438EFA13801FF3FCD2B2DEFC4C302C202313700043855
:203AC00018D0C102C00238CD5A3C2A965C111027A7ED5230EB19CD6E19280FE52A945CCD09
:203AE0006E19D12805A7ED52303F2AA35C23CD6E1956235E2A965CA7ED5230C4180300FF65
:203B0000FF2A9E5CCD6E19D52A945CCD6E19EBD1A7ED5238AB1812EFE4C338A7CD5B3C372C
:203B200008CD1B3C0830F818972A535C2B237EE6C020E4E5DDE1232323237EFE2220062315
:203B40007EFE2220FAFEEA2009DDE5E1CDB819EB18DCCDB618FE0D28D4225D5C21F93CBEEB
:203B600028062C20FADF18D1E7CD1B2D38CC225B5CCD1A2D2330FAFE0E20BF3534202BCD63
:203B80003932237ECD48202806FE2138F518ABCD8F187E236E67FE403808210F2722965CD4
:203BA000181522A35C2AA85CED4238502A9E5C2BED423048CD5A3C11810FCD800A118500EB
:203BC0002A655C19ED72F5CD013C23232377F1ED4B965C380FCD013C36B0233622CD1010E9
:203BE00036221803712370CD1B1A2A5B5C2B2BDD34022003DD3403CD1A2D30F2DF188EFF11
:203C0000FF2A5B5CC5CD1810C1DD7E02DD3502A72003DD35037EFE0E20EAC92A535C7EFE47
:203C20003FD046234E2BC5CDB819EBC5DDE1C1CD801930EA08A70823237E23666FDDE5C18B
:203C400009232323C5444DD5C51A626B23EDB012C1D1E12B7CB5C8E518ED37082A535CEDC3
:203C60005B945C7EFE40D0ED4B9E5CCD8019381DED4BA35CCD801928023012E508380372DD
:203C8000237308ED53965C2A995C19EBE1CD3932230918CF3E20D778FE212008118939CD71
:203CA00013003E15C343137EFE0DC8CD1010FE15D0FE10D8C31010CD991E78FE40180BCD71
:203CC000CD3C78FE20300479FE18D8CF0ACD07237A83D0CF0A5778B17AC20117CF174B0629
:203CE0005304500200E1C921085C757EFE0D2804FE2038F7C3B510FFFFECEDE5F7F0E1CA9F
:203D000000000000000000000010101010001000002424000000000000247E24247E24007F
:203D200000083E283E0A3E080062640810264600001028102A443A00000810000000000035
:203D400000040808080804000020101010102000000014083E081400000008083E080800E7
:203D60000000000000080810000000003E0000000000000000181800000002040810200077
:203D8000003C464A52623C000018280808083E00003C42023C407E00003C420C02423C004D
:203DA00000081828487E0800007E407C02423C00003C407C42423C00007E020408101000CF
:203DC000003C423C42423C00003C42423E023C0000000010000010000000100000101020BD
:203DE00000000408100804000000003E003E00000000100804081000003C42040800080059
:203E0000003C4A565E403C00003C42427E424200007C427C42427C00003C424040423C0074
:203E20000078444242447800007E407C40407E00007E407C40404000003C42404E423C00CA
:203E40000042427E42424200003E080808083E000002020242423C0000444870484442006E
:203E60000040404040407E000042665A42424200004262524A464200003C424242423C0074
:203E8000007C42427C404000003C4242524A3C00007C42427C444200003C403C02423C0054
:203EA00000FE1010101010000042424242423C00004242424224180000424242425A240064
:203EC00000422418182442000082442810101000007E040810207E00000E080808080E0054
:203EE00000004020100804000070101010107000001038541010100000000000000000FF5B
:203F0000001C227820207E00000038043C443C000020203C22223C0000001C2020201C00A1
:203F20000004043C44443C000000384478403C00000C10181010100000003C44443C043869
:203F40000040407844444400001000301010380000040004040424180020283030282400C5
:203F60000010101010100C0000006854545454000000784444444400000038444444380069
:203F8000000078444478404000003C44443C040600001C2020202000000038403804780057
:203FA0000010381010100C00000044444444380000004444282810000000445454542800E5
:203FC000000044281028440000004444443C043800007C0810207C00000E083008080E0021
:203FE00000080808080808000070100C1010700000142800000000003C4299A1A199423CC9
:00000001FF
rom/gw03.rom
BIN
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rom0.cnx
-98
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@@ -1,98 +0,0 @@
VERSION: WM1.0
MODULE: altsyncram
PRIVATE: ADDRESSSTALL_A NUMERIC "0"
PRIVATE: AclrAddr NUMERIC "0"
PRIVATE: AclrByte NUMERIC "0"
PRIVATE: AclrOutput NUMERIC "0"
PRIVATE: BYTE_ENABLE NUMERIC "0"
PRIVATE: BYTE_SIZE NUMERIC "8"
PRIVATE: BlankMemory NUMERIC "0"
PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC "0"
PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC "0"
PRIVATE: Clken NUMERIC "0"
PRIVATE: IMPLEMENT_IN_LES NUMERIC "0"
PRIVATE: INIT_FILE_LAYOUT STRING "PORT_A"
PRIVATE: INIT_TO_SIM_X NUMERIC "0"
PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
PRIVATE: JTAG_ENABLED NUMERIC "0"
PRIVATE: JTAG_ID STRING "NONE"
PRIVATE: MAXIMUM_DEPTH NUMERIC "0"
PRIVATE: MIFfilename STRING "led_patterns.mif"
PRIVATE: NUMWORDS_A NUMERIC "8"
PRIVATE: RAM_BLOCK_TYPE NUMERIC "0"
PRIVATE: RegAddr NUMERIC "1"
PRIVATE: RegOutput NUMERIC "1"
PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
PRIVATE: SingleClock NUMERIC "1"
PRIVATE: UseDQRAM NUMERIC "0"
PRIVATE: WidthAddr NUMERIC "3"
PRIVATE: WidthData NUMERIC "8"
PRIVATE: rden NUMERIC "0"
LIBRARY: altera_mf altera_mf.altera_mf_components.all
CONSTANT: ADDRESS_ACLR_A STRING "NONE"
CONSTANT: CLOCK_ENABLE_INPUT_A STRING "BYPASS"
CONSTANT: CLOCK_ENABLE_OUTPUT_A STRING "BYPASS"
CONSTANT: INIT_FILE STRING "led_patterns.mif"
CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
CONSTANT: LPM_HINT STRING "ENABLE_RUNTIME_MOD=NO"
CONSTANT: LPM_TYPE STRING "altsyncram"
CONSTANT: NUMWORDS_A NUMERIC "8"
CONSTANT: OPERATION_MODE STRING "ROM"
CONSTANT: OUTDATA_ACLR_A STRING "NONE"
CONSTANT: OUTDATA_REG_A STRING "CLOCK0"
CONSTANT: WIDTHAD_A NUMERIC "3"
CONSTANT: WIDTH_A NUMERIC "8"
CONSTANT: WIDTH_BYTEENA_A NUMERIC "1"
USED_PORT: address 0 0 3 0 INPUT NODEFVAL "address[2..0]"
USED_PORT: clock 0 0 0 0 INPUT VCC "clock"
USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL "q[7..0]"
CONNECT: @address_a 0 0 3 0 address 0 0 3 0
CONNECT: @clock0 0 0 0 0 clock 0 0 0 0
CONNECT: q 0 0 8 0 @q_a 0 0 8 0
GEN_FILE: TYPE_NORMAL rom0.v TRUE
GEN_FILE: TYPE_NORMAL rom0.inc FALSE
GEN_FILE: TYPE_NORMAL rom0.cmp FALSE
GEN_FILE: TYPE_NORMAL rom0.bsf FALSE
GEN_FILE: TYPE_NORMAL rom0_inst.v FALSE
GEN_FILE: TYPE_NORMAL rom0_bb.v TRUE
LIB_FILE: altera_mf
LICENSE_ID: "DEVICE_FAMILY_Cyclone III" 30229803K6032210322T
LICENSE_ID: "DEVICE_FAMILY_Cyclone IV E" 30229803A6032210322A
LICENSE_ID: "DEVICE_FAMILY_Cyclone V" 30229803A6032210322B
LICENSE_ID: "DEVICE_FAMILY_Cyclone IV GX" 30229803A6032210322B
LICENSE_ID: "DEVICE_FAMILY_Cyclone III LS" 30229803A6032210322B
LICENSE_ID: "FEATURE_STRATIXGX_DPA" 30229803M6032210322T
LICENSE_ID: "FEATURE_STRATIXGX_BASIC" 30229803A6032210322B
SUPPORTED_DEVICE_FAMILY: "Cyclone III"
SUPPORTED_DEVICE_FAMILY: "Cyclone IV E"
SUPPORTED_DEVICE_FAMILY: "Cyclone V"
SUPPORTED_DEVICE_FAMILY: "Cyclone IV GX"
SUPPORTED_DEVICE_FAMILY: "Cyclone III LS"
SUPPORTED_DEVICE_FAMILY: "Cyclone IV E"
WIZARD_TITLE: "ROM: 1-PORT"
QUARTUS_VERSION: "Version 13.1"
QUARTUS_SVERSION: "13.1.0 Build 162 10/23/2013 SJ Web Edition:10/23/2013"
QUARTUS_BUILD_DATE: "10/23/2013"
ALTERA_COPYRIGHT: "Copyright (C) 1991-2013 Altera Corporation"
RESC_INFO: ON
HELP_MENU_ITEM: FALSE "IUG_ALIAS$STRATIX_WEB_LINK$http://www.altera.com/literature/hb/stx/ch_3_vol_2.pdf"
HELP_MENU_ITEM: FALSE "ALIAS$STRATIX_WEB_MENU_LABEL$TriMatrix Memory Blocks in Stratix (GX)"
HELP_MENU_ITEM: FALSE "IUG_ALIAS$CYCLONE_IV_WEB_LINK$http://www.altera.com/literature/hb/cyclone-iv/cyiv-51003.pdf"
HELP_MENU_ITEM: FALSE "ALIAS$CYCLONE_IV_WEB_MENU_LABEL$Cyclone IV Memory Blocks"
HELP_MENU_ITEM: FALSE "IUG_ALIAS$CYCLONEII_WEB_LINK$http://www.altera.com/literature/hb/cyc2/cyc2_cii51008.pdf"
HELP_MENU_ITEM: FALSE "ALIAS$CYCLONEII_WEB_MENU_LABEL$Cyclone II Memory Blocks"
HELP_MENU_ITEM: FALSE "IUG_ALIAS$CYCLONE_WEB_LINK$http://www.altera.com/literature/hb/cyc/cyc_c51007.pdf"
HELP_MENU_ITEM: FALSE "ALIAS$CYCLONE_WEB_MENU_LABEL$Memory Implementations Using Cyclone Memory Blocks"
HELP_MENU_ITEM: FALSE "IUG_ALIAS$STRATIXII_WEB_LINK$http://www.altera.com/literature/hb/stx2/stx2_sii52002.pdf"
HELP_MENU_ITEM: FALSE "ALIAS$STRATIXII_WEB_MENU_LABEL$TriMatrix Memory Blocks in Stratix II"
HELP_MENU_ITEM: FALSE "IUG_ALIAS$STRATIXIII_WEB_LINK$http://www.altera.com/literature/hb/stx3/stx3_siii51004.pdf"
HELP_MENU_ITEM: FALSE "ALIAS$STRATIXIII_WEB_MENU_LABEL$TriMatrix Embedded Memory Blocks in Stratix III"
HELP_MENU_ITEM: FALSE "IUG_ALIAS$APEX_WEB_LINK$http://www.altera.com/literature/an/an179.pdf"
HELP_MENU_ITEM: FALSE "ALIAS$APEX_WEB_MENU_LABEL$Designing with ESBs"
HELP_MENU_ITEM: FALSE "IUG$ROM Megafunction User Guide$http://www.altera.com/literature/ug/ug_memrom.pdf"
rom0.v
+17 -12
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@@ -41,7 +41,7 @@ module rom0 (
clock, clock,
q); q);
input [2:0] address; input [13:0] address;
input clock; input clock;
output [7:0] q; output [7:0] q;
`ifndef ALTERA_RESERVED_QIS `ifndef ALTERA_RESERVED_QIS
@@ -83,15 +83,20 @@ module rom0 (
altsyncram_component.address_aclr_a = "NONE", altsyncram_component.address_aclr_a = "NONE",
altsyncram_component.clock_enable_input_a = "BYPASS", altsyncram_component.clock_enable_input_a = "BYPASS",
altsyncram_component.clock_enable_output_a = "BYPASS", altsyncram_component.clock_enable_output_a = "BYPASS",
altsyncram_component.init_file = "led_patterns.mif", `ifdef NO_PLI
altsyncram_component.init_file = "./rom/gw03.rif"
`else
altsyncram_component.init_file = "./rom/gw03.hex"
`endif
,
altsyncram_component.intended_device_family = "Cyclone IV E", altsyncram_component.intended_device_family = "Cyclone IV E",
altsyncram_component.lpm_hint = "ENABLE_RUNTIME_MOD=NO", altsyncram_component.lpm_hint = "ENABLE_RUNTIME_MOD=NO",
altsyncram_component.lpm_type = "altsyncram", altsyncram_component.lpm_type = "altsyncram",
altsyncram_component.numwords_a = 8, altsyncram_component.numwords_a = 16384,
altsyncram_component.operation_mode = "ROM", altsyncram_component.operation_mode = "ROM",
altsyncram_component.outdata_aclr_a = "NONE", altsyncram_component.outdata_aclr_a = "NONE",
altsyncram_component.outdata_reg_a = "CLOCK0", altsyncram_component.outdata_reg_a = "CLOCK0",
altsyncram_component.widthad_a = 3, altsyncram_component.widthad_a = 14,
altsyncram_component.width_a = 8, altsyncram_component.width_a = 8,
altsyncram_component.width_byteena_a = 1; altsyncram_component.width_byteena_a = 1;
@@ -118,36 +123,36 @@ endmodule
// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC "0" // Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC "0"
// Retrieval info: PRIVATE: JTAG_ID STRING "NONE" // Retrieval info: PRIVATE: JTAG_ID STRING "NONE"
// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC "0" // Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC "0"
// Retrieval info: PRIVATE: MIFfilename STRING "led_patterns.mif" // Retrieval info: PRIVATE: MIFfilename STRING "./rom/gw03.hex"
// Retrieval info: PRIVATE: NUMWORDS_A NUMERIC "8" // Retrieval info: PRIVATE: NUMWORDS_A NUMERIC "16384"
// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0" // Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0"
// Retrieval info: PRIVATE: RegAddr NUMERIC "1" // Retrieval info: PRIVATE: RegAddr NUMERIC "1"
// Retrieval info: PRIVATE: RegOutput NUMERIC "1" // Retrieval info: PRIVATE: RegOutput NUMERIC "1"
// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" // Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
// Retrieval info: PRIVATE: SingleClock NUMERIC "1" // Retrieval info: PRIVATE: SingleClock NUMERIC "1"
// Retrieval info: PRIVATE: UseDQRAM NUMERIC "0" // Retrieval info: PRIVATE: UseDQRAM NUMERIC "0"
// Retrieval info: PRIVATE: WidthAddr NUMERIC "3" // Retrieval info: PRIVATE: WidthAddr NUMERIC "14"
// Retrieval info: PRIVATE: WidthData NUMERIC "8" // Retrieval info: PRIVATE: WidthData NUMERIC "8"
// Retrieval info: PRIVATE: rden NUMERIC "0" // Retrieval info: PRIVATE: rden NUMERIC "0"
// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all // Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
// Retrieval info: CONSTANT: ADDRESS_ACLR_A STRING "NONE" // Retrieval info: CONSTANT: ADDRESS_ACLR_A STRING "NONE"
// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING "BYPASS" // Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING "BYPASS"
// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_A STRING "BYPASS" // Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_A STRING "BYPASS"
// Retrieval info: CONSTANT: INIT_FILE STRING "led_patterns.mif" // Retrieval info: CONSTANT: INIT_FILE STRING "./rom/gw03.hex"
// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E" // Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
// Retrieval info: CONSTANT: LPM_HINT STRING "ENABLE_RUNTIME_MOD=NO" // Retrieval info: CONSTANT: LPM_HINT STRING "ENABLE_RUNTIME_MOD=NO"
// Retrieval info: CONSTANT: LPM_TYPE STRING "altsyncram" // Retrieval info: CONSTANT: LPM_TYPE STRING "altsyncram"
// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC "8" // Retrieval info: CONSTANT: NUMWORDS_A NUMERIC "16384"
// Retrieval info: CONSTANT: OPERATION_MODE STRING "ROM" // Retrieval info: CONSTANT: OPERATION_MODE STRING "ROM"
// Retrieval info: CONSTANT: OUTDATA_ACLR_A STRING "NONE" // Retrieval info: CONSTANT: OUTDATA_ACLR_A STRING "NONE"
// Retrieval info: CONSTANT: OUTDATA_REG_A STRING "CLOCK0" // Retrieval info: CONSTANT: OUTDATA_REG_A STRING "CLOCK0"
// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC "3" // Retrieval info: CONSTANT: WIDTHAD_A NUMERIC "14"
// Retrieval info: CONSTANT: WIDTH_A NUMERIC "8" // Retrieval info: CONSTANT: WIDTH_A NUMERIC "8"
// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC "1" // Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC "1"
// Retrieval info: USED_PORT: address 0 0 3 0 INPUT NODEFVAL "address[2..0]" // Retrieval info: USED_PORT: address 0 0 14 0 INPUT NODEFVAL "address[13..0]"
// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC "clock" // Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC "clock"
// Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL "q[7..0]" // Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL "q[7..0]"
// Retrieval info: CONNECT: @address_a 0 0 3 0 address 0 0 3 0 // Retrieval info: CONNECT: @address_a 0 0 14 0 address 0 0 14 0
// Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0 // Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0
// Retrieval info: CONNECT: q 0 0 8 0 @q_a 0 0 8 0 // Retrieval info: CONNECT: q 0 0 8 0 @q_a 0 0 8 0
// Retrieval info: GEN_FILE: TYPE_NORMAL rom0.v TRUE // Retrieval info: GEN_FILE: TYPE_NORMAL rom0.v TRUE
rom0_bb.v
+9 -9
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@@ -36,7 +36,7 @@ module rom0 (
clock, clock,
q); q);
input [2:0] address; input [13:0] address;
input clock; input clock;
output [7:0] q; output [7:0] q;
`ifndef ALTERA_RESERVED_QIS `ifndef ALTERA_RESERVED_QIS
@@ -69,36 +69,36 @@ endmodule
// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC "0" // Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC "0"
// Retrieval info: PRIVATE: JTAG_ID STRING "NONE" // Retrieval info: PRIVATE: JTAG_ID STRING "NONE"
// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC "0" // Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC "0"
// Retrieval info: PRIVATE: MIFfilename STRING "led_patterns.mif" // Retrieval info: PRIVATE: MIFfilename STRING "./rom/gw03.hex"
// Retrieval info: PRIVATE: NUMWORDS_A NUMERIC "8" // Retrieval info: PRIVATE: NUMWORDS_A NUMERIC "16384"
// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0" // Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0"
// Retrieval info: PRIVATE: RegAddr NUMERIC "1" // Retrieval info: PRIVATE: RegAddr NUMERIC "1"
// Retrieval info: PRIVATE: RegOutput NUMERIC "1" // Retrieval info: PRIVATE: RegOutput NUMERIC "1"
// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" // Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
// Retrieval info: PRIVATE: SingleClock NUMERIC "1" // Retrieval info: PRIVATE: SingleClock NUMERIC "1"
// Retrieval info: PRIVATE: UseDQRAM NUMERIC "0" // Retrieval info: PRIVATE: UseDQRAM NUMERIC "0"
// Retrieval info: PRIVATE: WidthAddr NUMERIC "3" // Retrieval info: PRIVATE: WidthAddr NUMERIC "14"
// Retrieval info: PRIVATE: WidthData NUMERIC "8" // Retrieval info: PRIVATE: WidthData NUMERIC "8"
// Retrieval info: PRIVATE: rden NUMERIC "0" // Retrieval info: PRIVATE: rden NUMERIC "0"
// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all // Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
// Retrieval info: CONSTANT: ADDRESS_ACLR_A STRING "NONE" // Retrieval info: CONSTANT: ADDRESS_ACLR_A STRING "NONE"
// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING "BYPASS" // Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING "BYPASS"
// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_A STRING "BYPASS" // Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_A STRING "BYPASS"
// Retrieval info: CONSTANT: INIT_FILE STRING "led_patterns.mif" // Retrieval info: CONSTANT: INIT_FILE STRING "./rom/gw03.hex"
// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E" // Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
// Retrieval info: CONSTANT: LPM_HINT STRING "ENABLE_RUNTIME_MOD=NO" // Retrieval info: CONSTANT: LPM_HINT STRING "ENABLE_RUNTIME_MOD=NO"
// Retrieval info: CONSTANT: LPM_TYPE STRING "altsyncram" // Retrieval info: CONSTANT: LPM_TYPE STRING "altsyncram"
// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC "8" // Retrieval info: CONSTANT: NUMWORDS_A NUMERIC "16384"
// Retrieval info: CONSTANT: OPERATION_MODE STRING "ROM" // Retrieval info: CONSTANT: OPERATION_MODE STRING "ROM"
// Retrieval info: CONSTANT: OUTDATA_ACLR_A STRING "NONE" // Retrieval info: CONSTANT: OUTDATA_ACLR_A STRING "NONE"
// Retrieval info: CONSTANT: OUTDATA_REG_A STRING "CLOCK0" // Retrieval info: CONSTANT: OUTDATA_REG_A STRING "CLOCK0"
// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC "3" // Retrieval info: CONSTANT: WIDTHAD_A NUMERIC "14"
// Retrieval info: CONSTANT: WIDTH_A NUMERIC "8" // Retrieval info: CONSTANT: WIDTH_A NUMERIC "8"
// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC "1" // Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC "1"
// Retrieval info: USED_PORT: address 0 0 3 0 INPUT NODEFVAL "address[2..0]" // Retrieval info: USED_PORT: address 0 0 14 0 INPUT NODEFVAL "address[13..0]"
// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC "clock" // Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC "clock"
// Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL "q[7..0]" // Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL "q[7..0]"
// Retrieval info: CONNECT: @address_a 0 0 3 0 address 0 0 3 0 // Retrieval info: CONNECT: @address_a 0 0 14 0 address 0 0 14 0
// Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0 // Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0
// Retrieval info: CONNECT: q 0 0 8 0 @q_a 0 0 8 0 // Retrieval info: CONNECT: q 0 0 8 0 @q_a 0 0 8 0
// Retrieval info: GEN_FILE: TYPE_NORMAL rom0.v TRUE // Retrieval info: GEN_FILE: TYPE_NORMAL rom0.v TRUE
simulation/modelsim/spectrum.vo
+2086 -493
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simulation/modelsim/spectrum_6_1200mv_0c_slow.vo
+2086 -493
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simulation/modelsim/spectrum_6_1200mv_0c_v_slow.sdo
+2208 -230
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simulation/modelsim/spectrum_6_1200mv_85c_slow.vo
+2086 -493
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simulation/modelsim/spectrum_6_1200mv_85c_v_slow.sdo
+2215 -237
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simulation/modelsim/spectrum_min_1200mv_0c_fast.vo
+2086 -493
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simulation/modelsim/spectrum_min_1200mv_0c_v_fast.sdo
+2205 -227
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simulation/modelsim/spectrum_modelsim.xrf
+84 -30
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@@ -15,7 +15,10 @@ source_file = 1, /home/benny/altera/13.1/quartus/libraries/megafunctions/altrom.
source_file = 1, /home/benny/altera/13.1/quartus/libraries/megafunctions/altram.inc source_file = 1, /home/benny/altera/13.1/quartus/libraries/megafunctions/altram.inc
source_file = 1, /home/benny/altera/13.1/quartus/libraries/megafunctions/altdpram.inc source_file = 1, /home/benny/altera/13.1/quartus/libraries/megafunctions/altdpram.inc
source_file = 1, /home/benny/altera/13.1/quartus/libraries/megafunctions/cbx.lst source_file = 1, /home/benny/altera/13.1/quartus/libraries/megafunctions/cbx.lst
source_file = 1, /home/benny/work/fpga/projects/db/altsyncram_ro91.tdf source_file = 1, /home/benny/work/fpga/projects/db/altsyncram_qh91.tdf
source_file = 1, /home/benny/work/fpga/projects/rom/gw03.hex
source_file = 1, /home/benny/work/fpga/projects/db/decode_c8a.tdf
source_file = 1, /home/benny/work/fpga/projects/db/mux_3nb.tdf
design_name = spectrum design_name = spectrum
instance = comp, \LED[0]~output , LED[0]~output, spectrum, 1 instance = comp, \LED[0]~output , LED[0]~output, spectrum, 1
instance = comp, \LED[1]~output , LED[1]~output, spectrum, 1 instance = comp, \LED[1]~output , LED[1]~output, spectrum, 1
@@ -27,61 +30,112 @@ instance = comp, \LED[6]~output , LED[6]~output, spectrum, 1
instance = comp, \LED[7]~output , LED[7]~output, spectrum, 1 instance = comp, \LED[7]~output , LED[7]~output, spectrum, 1
instance = comp, \CLOCK_50~input , CLOCK_50~input, spectrum, 1 instance = comp, \CLOCK_50~input , CLOCK_50~input, spectrum, 1
instance = comp, \CLOCK_50~inputclkctrl , CLOCK_50~inputclkctrl, spectrum, 1 instance = comp, \CLOCK_50~inputclkctrl , CLOCK_50~inputclkctrl, spectrum, 1
instance = comp, \counter[20] , counter[20], spectrum, 1 instance = comp, \counter[0]~63 , counter[0]~63, spectrum, 1
instance = comp, \Add0~0 , Add0~0, spectrum, 1
instance = comp, \counter[0] , counter[0], spectrum, 1 instance = comp, \counter[0] , counter[0], spectrum, 1
instance = comp, \Add0~2 , Add0~2, spectrum, 1 instance = comp, \counter[1]~21 , counter[1]~21, spectrum, 1
instance = comp, \counter[1] , counter[1], spectrum, 1 instance = comp, \counter[1] , counter[1], spectrum, 1
instance = comp, \Add0~4 , Add0~4, spectrum, 1 instance = comp, \counter[2]~23 , counter[2]~23, spectrum, 1
instance = comp, \counter[2] , counter[2], spectrum, 1 instance = comp, \counter[2] , counter[2], spectrum, 1
instance = comp, \Add0~6 , Add0~6, spectrum, 1 instance = comp, \counter[3]~25 , counter[3]~25, spectrum, 1
instance = comp, \counter[3] , counter[3], spectrum, 1 instance = comp, \counter[3] , counter[3], spectrum, 1
instance = comp, \Add0~8 , Add0~8, spectrum, 1 instance = comp, \counter[4]~27 , counter[4]~27, spectrum, 1
instance = comp, \counter[4] , counter[4], spectrum, 1 instance = comp, \counter[4] , counter[4], spectrum, 1
instance = comp, \Add0~10 , Add0~10, spectrum, 1 instance = comp, \counter[5]~29 , counter[5]~29, spectrum, 1
instance = comp, \counter[5] , counter[5], spectrum, 1 instance = comp, \counter[5] , counter[5], spectrum, 1
instance = comp, \Add0~12 , Add0~12, spectrum, 1 instance = comp, \counter[6]~31 , counter[6]~31, spectrum, 1
instance = comp, \counter[6] , counter[6], spectrum, 1 instance = comp, \counter[6] , counter[6], spectrum, 1
instance = comp, \Add0~14 , Add0~14, spectrum, 1 instance = comp, \counter[7]~33 , counter[7]~33, spectrum, 1
instance = comp, \counter[7] , counter[7], spectrum, 1 instance = comp, \counter[7] , counter[7], spectrum, 1
instance = comp, \Add0~16 , Add0~16, spectrum, 1 instance = comp, \counter[8]~35 , counter[8]~35, spectrum, 1
instance = comp, \counter[8] , counter[8], spectrum, 1 instance = comp, \counter[8] , counter[8], spectrum, 1
instance = comp, \Add0~18 , Add0~18, spectrum, 1 instance = comp, \counter[9]~37 , counter[9]~37, spectrum, 1
instance = comp, \counter[9] , counter[9], spectrum, 1 instance = comp, \counter[9] , counter[9], spectrum, 1
instance = comp, \Add0~20 , Add0~20, spectrum, 1 instance = comp, \counter[10]~39 , counter[10]~39, spectrum, 1
instance = comp, \counter[10] , counter[10], spectrum, 1 instance = comp, \counter[10] , counter[10], spectrum, 1
instance = comp, \Add0~22 , Add0~22, spectrum, 1 instance = comp, \counter[11]~41 , counter[11]~41, spectrum, 1
instance = comp, \counter[11]~feeder , counter[11]~feeder, spectrum, 1
instance = comp, \counter[11] , counter[11], spectrum, 1 instance = comp, \counter[11] , counter[11], spectrum, 1
instance = comp, \Add0~24 , Add0~24, spectrum, 1 instance = comp, \counter[12]~43 , counter[12]~43, spectrum, 1
instance = comp, \counter[12] , counter[12], spectrum, 1 instance = comp, \counter[12] , counter[12], spectrum, 1
instance = comp, \Add0~26 , Add0~26, spectrum, 1 instance = comp, \counter[13]~45 , counter[13]~45, spectrum, 1
instance = comp, \counter[13] , counter[13], spectrum, 1 instance = comp, \counter[13] , counter[13], spectrum, 1
instance = comp, \Add0~28 , Add0~28, spectrum, 1 instance = comp, \counter[14]~47 , counter[14]~47, spectrum, 1
instance = comp, \counter[14] , counter[14], spectrum, 1 instance = comp, \counter[14] , counter[14], spectrum, 1
instance = comp, \Add0~30 , Add0~30, spectrum, 1 instance = comp, \counter[15]~49 , counter[15]~49, spectrum, 1
instance = comp, \counter[15] , counter[15], spectrum, 1 instance = comp, \counter[15] , counter[15], spectrum, 1
instance = comp, \Add0~32 , Add0~32, spectrum, 1 instance = comp, \counter[16]~51 , counter[16]~51, spectrum, 1
instance = comp, \counter[16] , counter[16], spectrum, 1 instance = comp, \counter[16] , counter[16], spectrum, 1
instance = comp, \Add0~34 , Add0~34, spectrum, 1 instance = comp, \counter[17]~53 , counter[17]~53, spectrum, 1
instance = comp, \counter[17] , counter[17], spectrum, 1 instance = comp, \counter[17] , counter[17], spectrum, 1
instance = comp, \Add0~36 , Add0~36, spectrum, 1 instance = comp, \counter[18]~55 , counter[18]~55, spectrum, 1
instance = comp, \counter[18] , counter[18], spectrum, 1 instance = comp, \counter[18] , counter[18], spectrum, 1
instance = comp, \Add0~38 , Add0~38, spectrum, 1 instance = comp, \counter[19]~57 , counter[19]~57, spectrum, 1
instance = comp, \counter[19] , counter[19], spectrum, 1 instance = comp, \counter[19] , counter[19], spectrum, 1
instance = comp, \Add0~40 , Add0~40, spectrum, 1
instance = comp, \Equal0~5 , Equal0~5, spectrum, 1 instance = comp, \Equal0~5 , Equal0~5, spectrum, 1
instance = comp, \Equal0~1 , Equal0~1, spectrum, 1
instance = comp, \Equal0~0 , Equal0~0, spectrum, 1 instance = comp, \Equal0~0 , Equal0~0, spectrum, 1
instance = comp, \Equal0~1 , Equal0~1, spectrum, 1
instance = comp, \Equal0~2 , Equal0~2, spectrum, 1 instance = comp, \Equal0~2 , Equal0~2, spectrum, 1
instance = comp, \Equal0~3 , Equal0~3, spectrum, 1 instance = comp, \Equal0~3 , Equal0~3, spectrum, 1
instance = comp, \Equal0~4 , Equal0~4, spectrum, 1 instance = comp, \Equal0~4 , Equal0~4, spectrum, 1
instance = comp, \address[0]~0 , address[0]~0, spectrum, 1 instance = comp, \counter[20]~59 , counter[20]~59, spectrum, 1
instance = comp, \address[0] , address[0], spectrum, 1 instance = comp, \counter[20] , counter[20], spectrum, 1
instance = comp, \Equal0~6 , Equal0~6, spectrum, 1 instance = comp, \counter[21]~61 , counter[21]~61, spectrum, 1
instance = comp, \counter[21] , counter[21], spectrum, 1
instance = comp, \Equal0~7 , Equal0~7, spectrum, 1 instance = comp, \Equal0~7 , Equal0~7, spectrum, 1
instance = comp, \address[1]~1 , address[1]~1, spectrum, 1 instance = comp, \address[0]~39 , address[0]~39, spectrum, 1
instance = comp, \address[0] , address[0], spectrum, 1
instance = comp, \address[1]~13 , address[1]~13, spectrum, 1
instance = comp, \Equal0~6 , Equal0~6, spectrum, 1
instance = comp, \address[1] , address[1], spectrum, 1 instance = comp, \address[1] , address[1], spectrum, 1
instance = comp, \address[1]~2 , address[1]~2, spectrum, 1 instance = comp, \address[2]~15 , address[2]~15, spectrum, 1
instance = comp, \address[2]~3 , address[2]~3, spectrum, 1
instance = comp, \address[2] , address[2], spectrum, 1 instance = comp, \address[2] , address[2], spectrum, 1
instance = comp, \address[3]~17 , address[3]~17, spectrum, 1
instance = comp, \address[3] , address[3], spectrum, 1
instance = comp, \address[4]~19 , address[4]~19, spectrum, 1
instance = comp, \address[4] , address[4], spectrum, 1
instance = comp, \address[5]~21 , address[5]~21, spectrum, 1
instance = comp, \address[5] , address[5], spectrum, 1
instance = comp, \address[6]~23 , address[6]~23, spectrum, 1
instance = comp, \address[6] , address[6], spectrum, 1
instance = comp, \address[7]~25 , address[7]~25, spectrum, 1
instance = comp, \address[7] , address[7], spectrum, 1
instance = comp, \address[8]~27 , address[8]~27, spectrum, 1
instance = comp, \address[8] , address[8], spectrum, 1
instance = comp, \address[9]~29 , address[9]~29, spectrum, 1
instance = comp, \address[9] , address[9], spectrum, 1
instance = comp, \address[10]~31 , address[10]~31, spectrum, 1
instance = comp, \address[10] , address[10], spectrum, 1
instance = comp, \address[11]~33 , address[11]~33, spectrum, 1
instance = comp, \address[11] , address[11], spectrum, 1
instance = comp, \address[12]~35 , address[12]~35, spectrum, 1
instance = comp, \address[12] , address[12], spectrum, 1
instance = comp, \address[13]~37 , address[13]~37, spectrum, 1
instance = comp, \address[13] , address[13], spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|address_reg_a[0]~feeder , rom|altsyncram_component|auto_generated|address_reg_a[0]~feeder, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|address_reg_a[0] , rom|altsyncram_component|auto_generated|address_reg_a[0], spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|out_address_reg_a[0]~feeder , rom|altsyncram_component|auto_generated|out_address_reg_a[0]~feeder, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|out_address_reg_a[0] , rom|altsyncram_component|auto_generated|out_address_reg_a[0], spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|ram_block1a8 , rom|altsyncram_component|auto_generated|ram_block1a8, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|ram_block1a0 , rom|altsyncram_component|auto_generated|ram_block1a0, spectrum, 1 instance = comp, \rom|altsyncram_component|auto_generated|ram_block1a0 , rom|altsyncram_component|auto_generated|ram_block1a0, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|mux2|result_node[0]~0 , rom|altsyncram_component|auto_generated|mux2|result_node[0]~0, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|ram_block1a1 , rom|altsyncram_component|auto_generated|ram_block1a1, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|ram_block1a9 , rom|altsyncram_component|auto_generated|ram_block1a9, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|mux2|result_node[1]~1 , rom|altsyncram_component|auto_generated|mux2|result_node[1]~1, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|ram_block1a2 , rom|altsyncram_component|auto_generated|ram_block1a2, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|ram_block1a10 , rom|altsyncram_component|auto_generated|ram_block1a10, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|mux2|result_node[2]~2 , rom|altsyncram_component|auto_generated|mux2|result_node[2]~2, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|ram_block1a11 , rom|altsyncram_component|auto_generated|ram_block1a11, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|ram_block1a3 , rom|altsyncram_component|auto_generated|ram_block1a3, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|mux2|result_node[3]~3 , rom|altsyncram_component|auto_generated|mux2|result_node[3]~3, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|ram_block1a4 , rom|altsyncram_component|auto_generated|ram_block1a4, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|ram_block1a12 , rom|altsyncram_component|auto_generated|ram_block1a12, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|mux2|result_node[4]~4 , rom|altsyncram_component|auto_generated|mux2|result_node[4]~4, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|ram_block1a13 , rom|altsyncram_component|auto_generated|ram_block1a13, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|ram_block1a5 , rom|altsyncram_component|auto_generated|ram_block1a5, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|mux2|result_node[5]~5 , rom|altsyncram_component|auto_generated|mux2|result_node[5]~5, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|ram_block1a14 , rom|altsyncram_component|auto_generated|ram_block1a14, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|ram_block1a6 , rom|altsyncram_component|auto_generated|ram_block1a6, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|mux2|result_node[6]~6 , rom|altsyncram_component|auto_generated|mux2|result_node[6]~6, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|ram_block1a7 , rom|altsyncram_component|auto_generated|ram_block1a7, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|ram_block1a15 , rom|altsyncram_component|auto_generated|ram_block1a15, spectrum, 1
instance = comp, \rom|altsyncram_component|auto_generated|mux2|result_node[7]~7 , rom|altsyncram_component|auto_generated|mux2|result_node[7]~7, spectrum, 1
simulation/modelsim/spectrum_v.sdo
+2215 -237
View File
File diff suppressed because it is too large Load Diff
spectrum.v
+4 -4
View File
@@ -3,7 +3,7 @@ module spectrum(
output wire[7:0] LED output wire[7:0] LED
); );
reg[2:0] address; reg[13:0] address;
wire[7:0] mem_data; wire[7:0] mem_data;
rom0 rom( rom0 rom(
@@ -12,12 +12,12 @@ rom0 rom(
.q(mem_data) .q(mem_data)
); );
reg[20:0] counter; reg[21:0] counter;
always @(posedge CLOCK_50) always @(posedge CLOCK_50)
begin begin
counter = counter + 1; counter <= counter + 1;
if (counter == 0) if (counter == 0)
address = address + 1; address <= address + 1;
end end
assign LED = mem_data; assign LED = mem_data;