53 lines
39 KiB
Plaintext
53 lines
39 KiB
Plaintext
{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1648641359299 ""}
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{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II 32-bit " "Running Quartus II 32-bit Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition " "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1648641359300 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed Mar 30 14:55:59 2022 " "Processing started: Wed Mar 30 14:55:59 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1648641359300 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1648641359300 ""}
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{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off spectrum -c spectrum " "Command: quartus_map --read_settings_files=on --write_settings_files=off spectrum -c spectrum" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1648641359301 ""}
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{ "Warning" "WQCU_PARALLEL_NO_LICENSE" "" "Parallel compilation is not licensed and has been disabled" { } { } 0 20028 "Parallel compilation is not licensed and has been disabled" 0 0 "Quartus II" 0 -1 1648641359468 ""}
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{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "spectrum.v 1 1 " "Found 1 design units, including 1 entities, in source file spectrum.v" { { "Info" "ISGN_ENTITY_NAME" "1 spectrum " "Found entity 1: spectrum" { } { { "spectrum.v" "" { Text "/home/benny/work/fpga/projects/spectrum.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1648641359535 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1648641359535 ""}
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{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "rom0.v 1 1 " "Found 1 design units, including 1 entities, in source file rom0.v" { { "Info" "ISGN_ENTITY_NAME" "1 rom0 " "Found entity 1: rom0" { } { { "rom0.v" "" { Text "/home/benny/work/fpga/projects/rom0.v" 39 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1648641359537 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1648641359537 ""}
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{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "ram16.v 1 1 " "Found 1 design units, including 1 entities, in source file ram16.v" { { "Info" "ISGN_ENTITY_NAME" "1 ram16 " "Found entity 1: ram16" { } { { "ram16.v" "" { Text "/home/benny/work/fpga/projects/ram16.v" 39 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1648641359538 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1648641359538 ""}
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{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "ram32.v 1 1 " "Found 1 design units, including 1 entities, in source file ram32.v" { { "Info" "ISGN_ENTITY_NAME" "1 ram32 " "Found entity 1: ram32" { } { { "ram32.v" "" { Text "/home/benny/work/fpga/projects/ram32.v" 39 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1648641359539 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1648641359539 ""}
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{ "Info" "ISGN_START_ELABORATION_TOP" "spectrum " "Elaborating entity \"spectrum\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Quartus II" 0 -1 1648641359598 ""}
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{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "RamWE spectrum.v(18) " "Verilog HDL or VHDL warning at spectrum.v(18): object \"RamWE\" assigned a value but never read" { } { { "spectrum.v" "" { Text "/home/benny/work/fpga/projects/spectrum.v" 18 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Quartus II" 0 -1 1648641359599 "|spectrum"}
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{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 22 spectrum.v(55) " "Verilog HDL assignment warning at spectrum.v(55): truncated value with size 32 to match size of target (22)" { } { { "spectrum.v" "" { Text "/home/benny/work/fpga/projects/spectrum.v" 55 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1648641359600 "|spectrum"}
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{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 spectrum.v(58) " "Verilog HDL assignment warning at spectrum.v(58): truncated value with size 32 to match size of target (16)" { } { { "spectrum.v" "" { Text "/home/benny/work/fpga/projects/spectrum.v" 58 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1648641359600 "|spectrum"}
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{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "GPIO_0\[33..32\] spectrum.v(3) " "Output port \"GPIO_0\[33..32\]\" at spectrum.v(3) has no driver" { } { { "spectrum.v" "" { Text "/home/benny/work/fpga/projects/spectrum.v" 3 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1648641359601 "|spectrum"}
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{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "rom0 rom0:rom " "Elaborating entity \"rom0\" for hierarchy \"rom0:rom\"" { } { { "spectrum.v" "rom" { Text "/home/benny/work/fpga/projects/spectrum.v" 12 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359613 ""}
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{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram rom0:rom\|altsyncram:altsyncram_component " "Elaborating entity \"altsyncram\" for hierarchy \"rom0:rom\|altsyncram:altsyncram_component\"" { } { { "rom0.v" "altsyncram_component" { Text "/home/benny/work/fpga/projects/rom0.v" 81 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359662 ""}
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{ "Info" "ISGN_ELABORATION_HEADER" "rom0:rom\|altsyncram:altsyncram_component " "Elaborated megafunction instantiation \"rom0:rom\|altsyncram:altsyncram_component\"" { } { { "rom0.v" "" { Text "/home/benny/work/fpga/projects/rom0.v" 81 0 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Quartus II" 0 -1 1648641359664 ""}
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{ "Info" "ISGN_MEGAFN_PARAM_TOP" "rom0:rom\|altsyncram:altsyncram_component " "Instantiated megafunction \"rom0:rom\|altsyncram:altsyncram_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "address_aclr_a NONE " "Parameter \"address_aclr_a\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359664 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_input_a BYPASS " "Parameter \"clock_enable_input_a\" = \"BYPASS\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359664 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_output_a BYPASS " "Parameter \"clock_enable_output_a\" = \"BYPASS\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359664 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "init_file ./rom/gw03.hex " "Parameter \"init_file\" = \"./rom/gw03.hex\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359664 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family Cyclone IV E " "Parameter \"intended_device_family\" = \"Cyclone IV E\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359664 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_hint ENABLE_RUNTIME_MOD=NO " "Parameter \"lpm_hint\" = \"ENABLE_RUNTIME_MOD=NO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359664 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type altsyncram " "Parameter \"lpm_type\" = \"altsyncram\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359664 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "numwords_a 16384 " "Parameter \"numwords_a\" = \"16384\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359664 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "operation_mode ROM " "Parameter \"operation_mode\" = \"ROM\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359664 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_aclr_a NONE " "Parameter \"outdata_aclr_a\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359664 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_reg_a CLOCK0 " "Parameter \"outdata_reg_a\" = \"CLOCK0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359664 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "widthad_a 14 " "Parameter \"widthad_a\" = \"14\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359664 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_a 8 " "Parameter \"width_a\" = \"8\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359664 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_byteena_a 1 " "Parameter \"width_byteena_a\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359664 ""} } { { "rom0.v" "" { Text "/home/benny/work/fpga/projects/rom0.v" 81 0 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Quartus II" 0 -1 1648641359664 ""}
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{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_qh91.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_qh91.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_qh91 " "Found entity 1: altsyncram_qh91" { } { { "db/altsyncram_qh91.tdf" "" { Text "/home/benny/work/fpga/projects/db/altsyncram_qh91.tdf" 31 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1648641359712 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1648641359712 ""}
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{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_qh91 rom0:rom\|altsyncram:altsyncram_component\|altsyncram_qh91:auto_generated " "Elaborating entity \"altsyncram_qh91\" for hierarchy \"rom0:rom\|altsyncram:altsyncram_component\|altsyncram_qh91:auto_generated\"" { } { { "altsyncram.tdf" "auto_generated" { Text "/home/benny/altera/13.1/quartus/libraries/megafunctions/altsyncram.tdf" 791 4 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359712 ""}
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{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/decode_c8a.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/decode_c8a.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 decode_c8a " "Found entity 1: decode_c8a" { } { { "db/decode_c8a.tdf" "" { Text "/home/benny/work/fpga/projects/db/decode_c8a.tdf" 22 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1648641359754 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1648641359754 ""}
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{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "decode_c8a rom0:rom\|altsyncram:altsyncram_component\|altsyncram_qh91:auto_generated\|decode_c8a:rden_decode " "Elaborating entity \"decode_c8a\" for hierarchy \"rom0:rom\|altsyncram:altsyncram_component\|altsyncram_qh91:auto_generated\|decode_c8a:rden_decode\"" { } { { "db/altsyncram_qh91.tdf" "rden_decode" { Text "/home/benny/work/fpga/projects/db/altsyncram_qh91.tdf" 40 2 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359754 ""}
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{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_3nb.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/mux_3nb.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_3nb " "Found entity 1: mux_3nb" { } { { "db/mux_3nb.tdf" "" { Text "/home/benny/work/fpga/projects/db/mux_3nb.tdf" 22 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1648641359796 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1648641359796 ""}
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{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "mux_3nb rom0:rom\|altsyncram:altsyncram_component\|altsyncram_qh91:auto_generated\|mux_3nb:mux2 " "Elaborating entity \"mux_3nb\" for hierarchy \"rom0:rom\|altsyncram:altsyncram_component\|altsyncram_qh91:auto_generated\|mux_3nb:mux2\"" { } { { "db/altsyncram_qh91.tdf" "mux2" { Text "/home/benny/work/fpga/projects/db/altsyncram_qh91.tdf" 41 2 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359796 ""}
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{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ram16 ram16:ram0 " "Elaborating entity \"ram16\" for hierarchy \"ram16:ram0\"" { } { { "spectrum.v" "ram0" { Text "/home/benny/work/fpga/projects/spectrum.v" 38 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359799 ""}
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{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram ram16:ram0\|altsyncram:altsyncram_component " "Elaborating entity \"altsyncram\" for hierarchy \"ram16:ram0\|altsyncram:altsyncram_component\"" { } { { "ram16.v" "altsyncram_component" { Text "/home/benny/work/fpga/projects/ram16.v" 97 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359803 ""}
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{ "Info" "ISGN_ELABORATION_HEADER" "ram16:ram0\|altsyncram:altsyncram_component " "Elaborated megafunction instantiation \"ram16:ram0\|altsyncram:altsyncram_component\"" { } { { "ram16.v" "" { Text "/home/benny/work/fpga/projects/ram16.v" 97 0 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""}
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{ "Info" "ISGN_MEGAFN_PARAM_TOP" "ram16:ram0\|altsyncram:altsyncram_component " "Instantiated megafunction \"ram16:ram0\|altsyncram:altsyncram_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "address_reg_b CLOCK0 " "Parameter \"address_reg_b\" = \"CLOCK0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_input_a BYPASS " "Parameter \"clock_enable_input_a\" = \"BYPASS\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_input_b BYPASS " "Parameter \"clock_enable_input_b\" = \"BYPASS\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_output_a BYPASS " "Parameter \"clock_enable_output_a\" = \"BYPASS\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_output_b BYPASS " "Parameter \"clock_enable_output_b\" = \"BYPASS\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_reg_b CLOCK0 " "Parameter \"indata_reg_b\" = \"CLOCK0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "init_file led_patterns.mif " "Parameter \"init_file\" = \"led_patterns.mif\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family Cyclone IV E " "Parameter \"intended_device_family\" = \"Cyclone IV E\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type altsyncram " "Parameter \"lpm_type\" = \"altsyncram\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "numwords_a 16384 " "Parameter \"numwords_a\" = \"16384\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "numwords_b 16384 " "Parameter \"numwords_b\" = \"16384\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "operation_mode BIDIR_DUAL_PORT " "Parameter \"operation_mode\" = \"BIDIR_DUAL_PORT\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_aclr_a NONE " "Parameter \"outdata_aclr_a\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_aclr_b NONE " "Parameter \"outdata_aclr_b\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_reg_a CLOCK0 " "Parameter \"outdata_reg_a\" = \"CLOCK0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_reg_b CLOCK0 " "Parameter \"outdata_reg_b\" = \"CLOCK0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "power_up_uninitialized FALSE " "Parameter \"power_up_uninitialized\" = \"FALSE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "read_during_write_mode_mixed_ports DONT_CARE " "Parameter \"read_during_write_mode_mixed_ports\" = \"DONT_CARE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "read_during_write_mode_port_a NEW_DATA_NO_NBE_READ " "Parameter \"read_during_write_mode_port_a\" = \"NEW_DATA_NO_NBE_READ\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "read_during_write_mode_port_b NEW_DATA_NO_NBE_READ " "Parameter \"read_during_write_mode_port_b\" = \"NEW_DATA_NO_NBE_READ\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "widthad_a 14 " "Parameter \"widthad_a\" = \"14\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "widthad_b 14 " "Parameter \"widthad_b\" = \"14\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_a 8 " "Parameter \"width_a\" = \"8\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_b 8 " "Parameter \"width_b\" = \"8\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_byteena_a 1 " "Parameter \"width_byteena_a\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_byteena_b 1 " "Parameter \"width_byteena_b\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_wraddress_reg_b CLOCK0 " "Parameter \"wrcontrol_wraddress_reg_b\" = \"CLOCK0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359804 ""} } { { "ram16.v" "" { Text "/home/benny/work/fpga/projects/ram16.v" 97 0 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Quartus II" 0 -1 1648641359804 ""}
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{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_bui2.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_bui2.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_bui2 " "Found entity 1: altsyncram_bui2" { } { { "db/altsyncram_bui2.tdf" "" { Text "/home/benny/work/fpga/projects/db/altsyncram_bui2.tdf" 33 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1648641359852 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1648641359852 ""}
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{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_bui2 ram16:ram0\|altsyncram:altsyncram_component\|altsyncram_bui2:auto_generated " "Elaborating entity \"altsyncram_bui2\" for hierarchy \"ram16:ram0\|altsyncram:altsyncram_component\|altsyncram_bui2:auto_generated\"" { } { { "altsyncram.tdf" "auto_generated" { Text "/home/benny/altera/13.1/quartus/libraries/megafunctions/altsyncram.tdf" 791 4 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359852 ""}
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{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/decode_jsa.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/decode_jsa.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 decode_jsa " "Found entity 1: decode_jsa" { } { { "db/decode_jsa.tdf" "" { Text "/home/benny/work/fpga/projects/db/decode_jsa.tdf" 22 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1648641359894 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1648641359894 ""}
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{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "decode_jsa ram16:ram0\|altsyncram:altsyncram_component\|altsyncram_bui2:auto_generated\|decode_jsa:decode2 " "Elaborating entity \"decode_jsa\" for hierarchy \"ram16:ram0\|altsyncram:altsyncram_component\|altsyncram_bui2:auto_generated\|decode_jsa:decode2\"" { } { { "db/altsyncram_bui2.tdf" "decode2" { Text "/home/benny/work/fpga/projects/db/altsyncram_bui2.tdf" 50 2 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359894 ""}
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{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ram32 ram32:ram1 " "Elaborating entity \"ram32\" for hierarchy \"ram32:ram1\"" { } { { "spectrum.v" "ram1" { Text "/home/benny/work/fpga/projects/spectrum.v" 49 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359899 ""}
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{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram ram32:ram1\|altsyncram:altsyncram_component " "Elaborating entity \"altsyncram\" for hierarchy \"ram32:ram1\|altsyncram:altsyncram_component\"" { } { { "ram32.v" "altsyncram_component" { Text "/home/benny/work/fpga/projects/ram32.v" 85 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359903 ""}
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{ "Info" "ISGN_ELABORATION_HEADER" "ram32:ram1\|altsyncram:altsyncram_component " "Elaborated megafunction instantiation \"ram32:ram1\|altsyncram:altsyncram_component\"" { } { { "ram32.v" "" { Text "/home/benny/work/fpga/projects/ram32.v" 85 0 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Quartus II" 0 -1 1648641359904 ""}
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{ "Info" "ISGN_MEGAFN_PARAM_TOP" "ram32:ram1\|altsyncram:altsyncram_component " "Instantiated megafunction \"ram32:ram1\|altsyncram:altsyncram_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_input_a BYPASS " "Parameter \"clock_enable_input_a\" = \"BYPASS\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359904 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_output_a BYPASS " "Parameter \"clock_enable_output_a\" = \"BYPASS\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359904 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "init_file led_patterns.mif " "Parameter \"init_file\" = \"led_patterns.mif\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359904 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family Cyclone IV E " "Parameter \"intended_device_family\" = \"Cyclone IV E\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359904 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_hint ENABLE_RUNTIME_MOD=NO " "Parameter \"lpm_hint\" = \"ENABLE_RUNTIME_MOD=NO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359904 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type altsyncram " "Parameter \"lpm_type\" = \"altsyncram\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359904 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "numwords_a 32768 " "Parameter \"numwords_a\" = \"32768\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359904 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "operation_mode SINGLE_PORT " "Parameter \"operation_mode\" = \"SINGLE_PORT\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359904 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_aclr_a NONE " "Parameter \"outdata_aclr_a\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359904 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_reg_a CLOCK0 " "Parameter \"outdata_reg_a\" = \"CLOCK0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359904 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "power_up_uninitialized FALSE " "Parameter \"power_up_uninitialized\" = \"FALSE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359904 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "read_during_write_mode_port_a NEW_DATA_NO_NBE_READ " "Parameter \"read_during_write_mode_port_a\" = \"NEW_DATA_NO_NBE_READ\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359904 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "widthad_a 15 " "Parameter \"widthad_a\" = \"15\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359904 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_a 8 " "Parameter \"width_a\" = \"8\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359904 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_byteena_a 1 " "Parameter \"width_byteena_a\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359904 ""} } { { "ram32.v" "" { Text "/home/benny/work/fpga/projects/ram32.v" 85 0 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Quartus II" 0 -1 1648641359904 ""}
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{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_g9i1.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_g9i1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_g9i1 " "Found entity 1: altsyncram_g9i1" { } { { "db/altsyncram_g9i1.tdf" "" { Text "/home/benny/work/fpga/projects/db/altsyncram_g9i1.tdf" 33 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1648641359952 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1648641359952 ""}
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{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_g9i1 ram32:ram1\|altsyncram:altsyncram_component\|altsyncram_g9i1:auto_generated " "Elaborating entity \"altsyncram_g9i1\" for hierarchy \"ram32:ram1\|altsyncram:altsyncram_component\|altsyncram_g9i1:auto_generated\"" { } { { "altsyncram.tdf" "auto_generated" { Text "/home/benny/altera/13.1/quartus/libraries/megafunctions/altsyncram.tdf" 791 4 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359953 ""}
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{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/decode_msa.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/decode_msa.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 decode_msa " "Found entity 1: decode_msa" { } { { "db/decode_msa.tdf" "" { Text "/home/benny/work/fpga/projects/db/decode_msa.tdf" 22 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1648641359994 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1648641359994 ""}
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{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "decode_msa ram32:ram1\|altsyncram:altsyncram_component\|altsyncram_g9i1:auto_generated\|decode_msa:decode3 " "Elaborating entity \"decode_msa\" for hierarchy \"ram32:ram1\|altsyncram:altsyncram_component\|altsyncram_g9i1:auto_generated\|decode_msa:decode3\"" { } { { "db/altsyncram_g9i1.tdf" "decode3" { Text "/home/benny/work/fpga/projects/db/altsyncram_g9i1.tdf" 44 2 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641359995 ""}
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{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/decode_f8a.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/decode_f8a.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 decode_f8a " "Found entity 1: decode_f8a" { } { { "db/decode_f8a.tdf" "" { Text "/home/benny/work/fpga/projects/db/decode_f8a.tdf" 22 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1648641360036 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1648641360036 ""}
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{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "decode_f8a ram32:ram1\|altsyncram:altsyncram_component\|altsyncram_g9i1:auto_generated\|decode_f8a:rden_decode " "Elaborating entity \"decode_f8a\" for hierarchy \"ram32:ram1\|altsyncram:altsyncram_component\|altsyncram_g9i1:auto_generated\|decode_f8a:rden_decode\"" { } { { "db/altsyncram_g9i1.tdf" "rden_decode" { Text "/home/benny/work/fpga/projects/db/altsyncram_g9i1.tdf" 45 2 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641360036 ""}
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{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_6nb.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/mux_6nb.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_6nb " "Found entity 1: mux_6nb" { } { { "db/mux_6nb.tdf" "" { Text "/home/benny/work/fpga/projects/db/mux_6nb.tdf" 22 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1648641360077 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1648641360077 ""}
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{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "mux_6nb ram32:ram1\|altsyncram:altsyncram_component\|altsyncram_g9i1:auto_generated\|mux_6nb:mux2 " "Elaborating entity \"mux_6nb\" for hierarchy \"ram32:ram1\|altsyncram:altsyncram_component\|altsyncram_g9i1:auto_generated\|mux_6nb:mux2\"" { } { { "db/altsyncram_g9i1.tdf" "mux2" { Text "/home/benny/work/fpga/projects/db/altsyncram_g9i1.tdf" 46 2 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1648641360078 ""}
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{ "Warning" "WSGN_TRI_BUS_MISSING_SOURCE_TOP" "" "Net is missing source, defaulting to GND" { { "Warning" "WSGN_TRI_BUS_MISSING_SOURCE_SUB" "D\[7\] " "Net \"D\[7\]\" is missing source, defaulting to GND" { } { { "spectrum.v" "D\[7\]" { Text "/home/benny/work/fpga/projects/spectrum.v" 16 -1 0 } } } 0 12110 "Net \"%1!s!\" is missing source, defaulting to GND" 0 0 "Quartus II" 0 -1 1648641360108 ""} { "Warning" "WSGN_TRI_BUS_MISSING_SOURCE_SUB" "D\[6\] " "Net \"D\[6\]\" is missing source, defaulting to GND" { } { { "spectrum.v" "D\[6\]" { Text "/home/benny/work/fpga/projects/spectrum.v" 16 -1 0 } } } 0 12110 "Net \"%1!s!\" is missing source, defaulting to GND" 0 0 "Quartus II" 0 -1 1648641360108 ""} { "Warning" "WSGN_TRI_BUS_MISSING_SOURCE_SUB" "D\[5\] " "Net \"D\[5\]\" is missing source, defaulting to GND" { } { { "spectrum.v" "D\[5\]" { Text "/home/benny/work/fpga/projects/spectrum.v" 16 -1 0 } } } 0 12110 "Net \"%1!s!\" is missing source, defaulting to GND" 0 0 "Quartus II" 0 -1 1648641360108 ""} { "Warning" "WSGN_TRI_BUS_MISSING_SOURCE_SUB" "D\[4\] " "Net \"D\[4\]\" is missing source, defaulting to GND" { } { { "spectrum.v" "D\[4\]" { Text "/home/benny/work/fpga/projects/spectrum.v" 16 -1 0 } } } 0 12110 "Net \"%1!s!\" is missing source, defaulting to GND" 0 0 "Quartus II" 0 -1 1648641360108 ""} { "Warning" "WSGN_TRI_BUS_MISSING_SOURCE_SUB" "D\[3\] " "Net \"D\[3\]\" is missing source, defaulting to GND" { } { { "spectrum.v" "D\[3\]" { Text "/home/benny/work/fpga/projects/spectrum.v" 16 -1 0 } } } 0 12110 "Net \"%1!s!\" is missing source, defaulting to GND" 0 0 "Quartus II" 0 -1 1648641360108 ""} { "Warning" "WSGN_TRI_BUS_MISSING_SOURCE_SUB" "D\[2\] " "Net \"D\[2\]\" is missing source, defaulting to GND" { } { { "spectrum.v" "D\[2\]" { Text "/home/benny/work/fpga/projects/spectrum.v" 16 -1 0 } } } 0 12110 "Net \"%1!s!\" is missing source, defaulting to GND" 0 0 "Quartus II" 0 -1 1648641360108 ""} { "Warning" "WSGN_TRI_BUS_MISSING_SOURCE_SUB" "D\[1\] " "Net \"D\[1\]\" is missing source, defaulting to GND" { } { { "spectrum.v" "D\[1\]" { Text "/home/benny/work/fpga/projects/spectrum.v" 16 -1 0 } } } 0 12110 "Net \"%1!s!\" is missing source, defaulting to GND" 0 0 "Quartus II" 0 -1 1648641360108 ""} { "Warning" "WSGN_TRI_BUS_MISSING_SOURCE_SUB" "D\[0\] " "Net \"D\[0\]\" is missing source, defaulting to GND" { } { { "spectrum.v" "D\[0\]" { Text "/home/benny/work/fpga/projects/spectrum.v" 16 -1 0 } } } 0 12110 "Net \"%1!s!\" is missing source, defaulting to GND" 0 0 "Quartus II" 0 -1 1648641360108 ""} } { } 0 12011 "Net is missing source, defaulting to GND" 0 0 "Quartus II" 0 -1 1648641360108 ""}
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{ "Warning" "WSGN_TRI_BUS_MISSING_SOURCE_TOP" "" "Net is missing source, defaulting to GND" { { "Warning" "WSGN_TRI_BUS_MISSING_SOURCE_SUB" "D\[7\] " "Net \"D\[7\]\" is missing source, defaulting to GND" { } { { "spectrum.v" "D\[7\]" { Text "/home/benny/work/fpga/projects/spectrum.v" 16 -1 0 } } } 0 12110 "Net \"%1!s!\" is missing source, defaulting to GND" 0 0 "Quartus II" 0 -1 1648641360109 ""} { "Warning" "WSGN_TRI_BUS_MISSING_SOURCE_SUB" "D\[6\] " "Net \"D\[6\]\" is missing source, defaulting to GND" { } { { "spectrum.v" "D\[6\]" { Text "/home/benny/work/fpga/projects/spectrum.v" 16 -1 0 } } } 0 12110 "Net \"%1!s!\" is missing source, defaulting to GND" 0 0 "Quartus II" 0 -1 1648641360109 ""} { "Warning" "WSGN_TRI_BUS_MISSING_SOURCE_SUB" "D\[5\] " "Net \"D\[5\]\" is missing source, defaulting to GND" { } { { "spectrum.v" "D\[5\]" { Text "/home/benny/work/fpga/projects/spectrum.v" 16 -1 0 } } } 0 12110 "Net \"%1!s!\" is missing source, defaulting to GND" 0 0 "Quartus II" 0 -1 1648641360109 ""} { "Warning" "WSGN_TRI_BUS_MISSING_SOURCE_SUB" "D\[4\] " "Net \"D\[4\]\" is missing source, defaulting to GND" { } { { "spectrum.v" "D\[4\]" { Text "/home/benny/work/fpga/projects/spectrum.v" 16 -1 0 } } } 0 12110 "Net \"%1!s!\" is missing source, defaulting to GND" 0 0 "Quartus II" 0 -1 1648641360109 ""} { "Warning" "WSGN_TRI_BUS_MISSING_SOURCE_SUB" "D\[3\] " "Net \"D\[3\]\" is missing source, defaulting to GND" { } { { "spectrum.v" "D\[3\]" { Text "/home/benny/work/fpga/projects/spectrum.v" 16 -1 0 } } } 0 12110 "Net \"%1!s!\" is missing source, defaulting to GND" 0 0 "Quartus II" 0 -1 1648641360109 ""} { "Warning" "WSGN_TRI_BUS_MISSING_SOURCE_SUB" "D\[2\] " "Net \"D\[2\]\" is missing source, defaulting to GND" { } { { "spectrum.v" "D\[2\]" { Text "/home/benny/work/fpga/projects/spectrum.v" 16 -1 0 } } } 0 12110 "Net \"%1!s!\" is missing source, defaulting to GND" 0 0 "Quartus II" 0 -1 1648641360109 ""} { "Warning" "WSGN_TRI_BUS_MISSING_SOURCE_SUB" "D\[1\] " "Net \"D\[1\]\" is missing source, defaulting to GND" { } { { "spectrum.v" "D\[1\]" { Text "/home/benny/work/fpga/projects/spectrum.v" 16 -1 0 } } } 0 12110 "Net \"%1!s!\" is missing source, defaulting to GND" 0 0 "Quartus II" 0 -1 1648641360109 ""} { "Warning" "WSGN_TRI_BUS_MISSING_SOURCE_SUB" "D\[0\] " "Net \"D\[0\]\" is missing source, defaulting to GND" { } { { "spectrum.v" "D\[0\]" { Text "/home/benny/work/fpga/projects/spectrum.v" 16 -1 0 } } } 0 12110 "Net \"%1!s!\" is missing source, defaulting to GND" 0 0 "Quartus II" 0 -1 1648641360109 ""} } { } 0 12011 "Net is missing source, defaulting to GND" 0 0 "Quartus II" 0 -1 1648641360109 ""}
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{ "Warning" "WSGN_CONNECTIVITY_WARNINGS" "3 " "3 hierarchies have connectivity warnings - see the Connectivity Checks report folder" { } { } 0 12241 "%1!d! hierarchies have connectivity warnings - see the Connectivity Checks report folder" 0 0 "Quartus II" 0 -1 1648641360565 ""}
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{ "Warning" "WMLS_MLS_STUCK_PIN_HDR" "" "Output pins are stuck at VCC or GND" { { "Warning" "WMLS_MLS_STUCK_PIN" "GPIO_0\[32\] GND " "Pin \"GPIO_0\[32\]\" is stuck at GND" { } { { "spectrum.v" "" { Text "/home/benny/work/fpga/projects/spectrum.v" 3 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 -1 1648641360598 "|spectrum|GPIO_0[32]"} { "Warning" "WMLS_MLS_STUCK_PIN" "GPIO_0\[33\] GND " "Pin \"GPIO_0\[33\]\" is stuck at GND" { } { { "spectrum.v" "" { Text "/home/benny/work/fpga/projects/spectrum.v" 3 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 -1 1648641360598 "|spectrum|GPIO_0[33]"} } { } 0 13024 "Output pins are stuck at VCC or GND" 0 0 "Quartus II" 0 -1 1648641360598 ""}
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{ "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING" "" "Timing-Driven Synthesis is running" { } { } 0 286030 "Timing-Driven Synthesis is running" 0 0 "Quartus II" 0 -1 1648641360706 ""}
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{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "1 " "1 registers lost all their fanouts during netlist optimizations." { } { } 0 17049 "%1!d! registers lost all their fanouts during netlist optimizations." 0 0 "Quartus II" 0 -1 1648641360825 ""}
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{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" { } { } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Quartus II" 0 -1 1648641360993 ""} } { } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Quartus II" 0 -1 1648641360993 ""}
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{ "Info" "ICUT_CUT_TM_SUMMARY" "201 " "Implemented 201 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "1 " "Implemented 1 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Quartus II" 0 -1 1648641361057 ""} { "Info" "ICUT_CUT_TM_OPINS" "42 " "Implemented 42 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Quartus II" 0 -1 1648641361057 ""} { "Info" "ICUT_CUT_TM_LCELLS" "94 " "Implemented 94 logic cells" { } { } 0 21061 "Implemented %1!d! logic cells" 0 0 "Quartus II" 0 -1 1648641361057 ""} { "Info" "ICUT_CUT_TM_RAMS" "64 " "Implemented 64 RAM segments" { } { } 0 21064 "Implemented %1!d! RAM segments" 0 0 "Quartus II" 0 -1 1648641361057 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Quartus II" 0 -1 1648641361057 ""}
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{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 27 s Quartus II 32-bit " "Quartus II 32-bit Analysis & Synthesis was successful. 0 errors, 27 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "395 " "Peak virtual memory: 395 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1648641361068 ""} { "Info" "IQEXE_END_BANNER_TIME" "Wed Mar 30 14:56:01 2022 " "Processing ended: Wed Mar 30 14:56:01 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1648641361068 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Elapsed time: 00:00:02" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1648641361068 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Total CPU time (on all processors): 00:00:02" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1648641361068 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1648641361068 ""}
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