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Fixed clocks

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This commit is contained in:
Adrian Scripca
2022-04-02 15:57:16 +03:00
parent d20be0fefc
commit f114ff0549
75 changed files with 407468 additions and 409289 deletions
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output_files/spectrum.asm.rpt
+6 -6
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@@ -1,5 +1,5 @@
Assembler report for spectrum
Fri Apr 1 18:55:43 2022
Sat Apr 2 15:53:36 2022
Quartus II 32-bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
@@ -37,7 +37,7 @@ applicable agreement for further details.
+---------------------------------------------------------------+
; Assembler Summary ;
+-----------------------+---------------------------------------+
; Assembler Status ; Successful - Fri Apr 1 18:55:43 2022 ;
; Assembler Status ; Successful - Sat Apr 2 15:53:36 2022 ;
; Revision Name ; spectrum ;
; Top-level Entity Name ; spectrum ;
; Family ; Cyclone IV E ;
@@ -162,8 +162,8 @@ Default Value : On
; Option ; Setting ;
+----------------+-----------------------+
; Device ; EP4CE22F17C6 ;
; JTAG usercode ; 0x0056423F ;
; Checksum ; 0x0056423F ;
; JTAG usercode ; 0x0056105B ;
; Checksum ; 0x0056105B ;
+----------------+-----------------------+
@@ -173,13 +173,13 @@ Default Value : On
Info: *******************************************************************
Info: Running Quartus II 32-bit Assembler
Info: Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
Info: Processing started: Fri Apr 1 18:55:41 2022
Info: Processing started: Sat Apr 2 15:53:34 2022
Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off spectrum -c spectrum
Info (115031): Writing out detailed assembly data for power analysis
Info (115030): Assembler is generating device programming files
Info: Quartus II 32-bit Assembler was successful. 0 errors, 0 warnings
Info: Peak virtual memory: 385 megabytes
Info: Processing ended: Fri Apr 1 18:55:43 2022
Info: Processing ended: Sat Apr 2 15:53:36 2022
Info: Elapsed time: 00:00:02
Info: Total CPU time (on all processors): 00:00:02
output_files/spectrum.done
+1 -1
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@@ -1 +1 @@
Fri Apr 1 18:55:53 2022
Sat Apr 2 15:53:46 2022
output_files/spectrum.eda.rpt
+4 -4
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@@ -1,5 +1,5 @@
EDA Netlist Writer report for spectrum
Fri Apr 1 18:55:53 2022
Sat Apr 2 15:53:46 2022
Quartus II 32-bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
@@ -36,7 +36,7 @@ applicable agreement for further details.
+-------------------------------------------------------------------+
; EDA Netlist Writer Summary ;
+---------------------------+---------------------------------------+
; EDA Netlist Writer Status ; Successful - Fri Apr 1 18:55:53 2022 ;
; EDA Netlist Writer Status ; Successful - Sat Apr 2 15:53:46 2022 ;
; Revision Name ; spectrum ;
; Top-level Entity Name ; spectrum ;
; Family ; Cyclone IV E ;
@@ -88,7 +88,7 @@ applicable agreement for further details.
Info: *******************************************************************
Info: Running Quartus II 32-bit EDA Netlist Writer
Info: Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
Info: Processing started: Fri Apr 1 18:55:50 2022
Info: Processing started: Sat Apr 2 15:53:43 2022
Info: Command: quartus_eda --read_settings_files=off --write_settings_files=off spectrum -c spectrum
Info (204019): Generated file spectrum_6_1200mv_85c_slow.vo in folder "/home/benny/work/fpga/spectrum/simulation/modelsim/" for EDA simulation tool
Info (204019): Generated file spectrum_6_1200mv_0c_slow.vo in folder "/home/benny/work/fpga/spectrum/simulation/modelsim/" for EDA simulation tool
@@ -100,7 +100,7 @@ Info (204019): Generated file spectrum_min_1200mv_0c_v_fast.sdo in folder "/home
Info (204019): Generated file spectrum_v.sdo in folder "/home/benny/work/fpga/spectrum/simulation/modelsim/" for EDA simulation tool
Info: Quartus II 32-bit EDA Netlist Writer was successful. 0 errors, 0 warnings
Info: Peak virtual memory: 380 megabytes
Info: Processing ended: Fri Apr 1 18:55:53 2022
Info: Processing ended: Sat Apr 2 15:53:46 2022
Info: Elapsed time: 00:00:03
Info: Total CPU time (on all processors): 00:00:03
output_files/spectrum.fit.rpt
+1521 -1515
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File diff suppressed because it is too large Load Diff
output_files/spectrum.fit.summary
+3 -3
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@@ -1,12 +1,12 @@
Fitter Status : Successful - Fri Apr 1 18:55:39 2022
Fitter Status : Successful - Sat Apr 2 15:53:32 2022
Quartus II 32-bit Version : 13.1.0 Build 162 10/23/2013 SJ Web Edition
Revision Name : spectrum
Top-level Entity Name : spectrum
Family : Cyclone IV E
Device : EP4CE22F17C6
Timing Models : Final
Total logic elements : 2,396 / 22,320 ( 11 % )
Total combinational functions : 2,272 / 22,320 ( 10 % )
Total logic elements : 2,376 / 22,320 ( 11 % )
Total combinational functions : 2,258 / 22,320 ( 10 % )
Dedicated logic registers : 591 / 22,320 ( 3 % )
Total registers : 600
Total pins : 75 / 154 ( 49 % )
output_files/spectrum.flow.rpt
+13 -13
View File
@@ -1,5 +1,5 @@
Flow report for spectrum
Fri Apr 1 18:55:53 2022
Sat Apr 2 15:53:46 2022
Quartus II 32-bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
@@ -40,15 +40,15 @@ applicable agreement for further details.
+---------------------------------------------------------------------------------+
; Flow Summary ;
+------------------------------------+--------------------------------------------+
; Flow Status ; Successful - Fri Apr 1 18:55:53 2022 ;
; Flow Status ; Successful - Sat Apr 2 15:53:46 2022 ;
; Quartus II 32-bit Version ; 13.1.0 Build 162 10/23/2013 SJ Web Edition ;
; Revision Name ; spectrum ;
; Top-level Entity Name ; spectrum ;
; Family ; Cyclone IV E ;
; Device ; EP4CE22F17C6 ;
; Timing Models ; Final ;
; Total logic elements ; 2,396 / 22,320 ( 11 % ) ;
; Total combinational functions ; 2,272 / 22,320 ( 10 % ) ;
; Total logic elements ; 2,376 / 22,320 ( 11 % ) ;
; Total combinational functions ; 2,258 / 22,320 ( 10 % ) ;
; Dedicated logic registers ; 591 / 22,320 ( 3 % ) ;
; Total registers ; 600 ;
; Total pins ; 75 / 154 ( 49 % ) ;
@@ -64,7 +64,7 @@ applicable agreement for further details.
+-------------------+---------------------+
; Option ; Setting ;
+-------------------+---------------------+
; Start date & time ; 04/01/2022 18:55:04 ;
; Start date & time ; 04/02/2022 15:52:58 ;
; Main task ; Compilation ;
; Revision Name ; spectrum ;
+-------------------+---------------------+
@@ -74,7 +74,7 @@ applicable agreement for further details.
; Flow Non-Default Global Settings ;
+--------------------------------------------------------------------------------+
Assignment Name : COMPILER_SIGNATURE_ID
Value : 0.164882850457192
Value : 0.164890397819294
Default Value : --
Entity Name : --
Section Id : --
@@ -278,15 +278,15 @@ Section Id : --
; Flow Elapsed Time ;
+--------------------------------------------------------------------------------+
Module Name : Analysis & Synthesis
Elapsed Time : 00:00:13
Elapsed Time : 00:00:12
Average Processors Used : 1.0
Peak Virtual Memory : 441 MB
Total CPU Time (on all processors) : 00:00:13
Total CPU Time (on all processors) : 00:00:12
Module Name : Fitter
Elapsed Time : 00:00:21
Average Processors Used : 1.0
Peak Virtual Memory : 639 MB
Peak Virtual Memory : 634 MB
Total CPU Time (on all processors) : 00:00:21
Module Name : Assembler
@@ -298,8 +298,8 @@ Total CPU Time (on all processors) : 00:00:02
Module Name : TimeQuest Timing Analyzer
Elapsed Time : 00:00:04
Average Processors Used : 1.0
Peak Virtual Memory : 437 MB
Total CPU Time (on all processors) : 00:00:04
Peak Virtual Memory : 440 MB
Total CPU Time (on all processors) : 00:00:03
Module Name : EDA Netlist Writer
Elapsed Time : 00:00:03
@@ -308,10 +308,10 @@ Peak Virtual Memory : 372 MB
Total CPU Time (on all processors) : 00:00:03
Module Name : Total
Elapsed Time : 00:00:43
Elapsed Time : 00:00:42
Average Processors Used : --
Peak Virtual Memory : --
Total CPU Time (on all processors) : 00:00:43
Total CPU Time (on all processors) : 00:00:41
+--------------------------------------------------------------------------------+
output_files/spectrum.jdi
+1 -1
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@@ -1,6 +1,6 @@
<sld_project_info>
<project>
<hash md5_digest_80b="8380d13cf466db2d8054"/>
<hash md5_digest_80b="4f424ba9a0f5c16836a4"/>
</project>
<file_info>
<file device="EP4CE22F17C6" path="spectrum.sof" usercode="0xFFFFFFFF"/>
output_files/spectrum.map.rpt
+49 -49
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@@ -1,5 +1,5 @@
Analysis & Synthesis report for spectrum
Fri Apr 1 18:55:17 2022
Sat Apr 2 15:53:10 2022
Quartus II 32-bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
@@ -70,13 +70,13 @@ applicable agreement for further details.
+---------------------------------------------------------------------------------+
; Analysis & Synthesis Summary ;
+------------------------------------+--------------------------------------------+
; Analysis & Synthesis Status ; Successful - Fri Apr 1 18:55:17 2022 ;
; Analysis & Synthesis Status ; Successful - Sat Apr 2 15:53:10 2022 ;
; Quartus II 32-bit Version ; 13.1.0 Build 162 10/23/2013 SJ Web Edition ;
; Revision Name ; spectrum ;
; Top-level Entity Name ; spectrum ;
; Family ; Cyclone IV E ;
; Total logic elements ; 2,537 ;
; Total combinational functions ; 2,269 ;
; Total logic elements ; 2,523 ;
; Total combinational functions ; 2,255 ;
; Dedicated logic registers ; 592 ;
; Total registers ; 592 ;
; Total pins ; 75 ;
@@ -935,16 +935,16 @@ Library :
+---------------------------------------------+---------------------------------+
; Resource ; Usage ;
+---------------------------------------------+---------------------------------+
; Estimated Total logic elements ; 2,537 ;
; Estimated Total logic elements ; 2,523 ;
; ; ;
; Total combinational functions ; 2269 ;
; Total combinational functions ; 2255 ;
; Logic element usage by number of LUT inputs ; ;
; -- 4 input functions ; 1640 ;
; -- 3 input functions ; 385 ;
; -- <=2 input functions ; 244 ;
; -- 4 input functions ; 1637 ;
; -- 3 input functions ; 372 ;
; -- <=2 input functions ; 246 ;
; ; ;
; Logic elements by mode ; ;
; -- normal mode ; 2216 ;
; -- normal mode ; 2202 ;
; -- arithmetic mode ; 53 ;
; ; ;
; Total registers ; 592 ;
@@ -959,8 +959,8 @@ Library :
; ; ;
; Maximum fan-out node ; ula:ula_|clocks:clocks_|clk_cpu ;
; Maximum fan-out ; 436 ;
; Total fan-out ; 11524 ;
; Average fan-out ; 3.74 ;
; Total fan-out ; 11477 ;
; Average fan-out ; 3.75 ;
+---------------------------------------------+---------------------------------+
@@ -968,7 +968,7 @@ Library :
; Analysis & Synthesis Resource Utilization by Entity ;
+--------------------------------------------------------------------------------+
Compilation Hierarchy Node : |spectrum
LC Combinationals : 2269 (98)
LC Combinationals : 2255 (86)
LC Registers : 592 (0)
Memory Bits : 524288
DSP Elements : 0
@@ -1028,7 +1028,7 @@ Full Hierarchy Name : |spectrum|ram16:ram0|altsyncram:altsyncram_componen
Library Name : work
Compilation Hierarchy Node : |ram32:ram1|
LC Combinationals : 16 (0)
LC Combinationals : 24 (0)
LC Registers : 4 (0)
Memory Bits : 262144
DSP Elements : 0
@@ -1040,7 +1040,7 @@ Full Hierarchy Name : |spectrum|ram32:ram1
Library Name : work
Compilation Hierarchy Node : |altsyncram:altsyncram_component|
LC Combinationals : 16 (0)
LC Combinationals : 24 (0)
LC Registers : 4 (0)
Memory Bits : 262144
DSP Elements : 0
@@ -1052,7 +1052,7 @@ Full Hierarchy Name : |spectrum|ram32:ram1|altsyncram:altsyncram_componen
Library Name : work
Compilation Hierarchy Node : |altsyncram_g9i1:auto_generated|
LC Combinationals : 16 (0)
LC Combinationals : 24 (0)
LC Registers : 4 (4)
Memory Bits : 262144
DSP Elements : 0
@@ -1088,7 +1088,7 @@ Full Hierarchy Name : |spectrum|ram32:ram1|altsyncram:altsyncram_componen
Library Name : work
Compilation Hierarchy Node : |mux_6nb:mux2|
LC Combinationals : 8 (8)
LC Combinationals : 16 (16)
LC Registers : 0 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1160,7 +1160,7 @@ Full Hierarchy Name : |spectrum|ula:ula_|clocks:clocks_
Library Name : work
Compilation Hierarchy Node : |i2c_loader:i2c_loader_|
LC Combinationals : 81 (81)
LC Combinationals : 80 (80)
LC Registers : 34 (34)
Memory Bits : 0
DSP Elements : 0
@@ -1244,7 +1244,7 @@ Full Hierarchy Name : |spectrum|ula:ula_|video:video_
Library Name : work
Compilation Hierarchy Node : |zx_keyboard:zx_keyboard_|
LC Combinationals : 150 (150)
LC Combinationals : 151 (151)
LC Registers : 43 (43)
Memory Bits : 0
DSP Elements : 0
@@ -1256,7 +1256,7 @@ Full Hierarchy Name : |spectrum|ula:ula_|zx_keyboard:zx_keyboard_
Library Name : work
Compilation Hierarchy Node : |z80_top_direct_n:z80_|
LC Combinationals : 1733 (2)
LC Combinationals : 1723 (2)
LC Registers : 362 (1)
Memory Bits : 0
DSP Elements : 0
@@ -1268,7 +1268,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_
Library Name : work
Compilation Hierarchy Node : |address_latch:address_latch_|
LC Combinationals : 48 (16)
LC Combinationals : 46 (16)
LC Registers : 16 (16)
Memory Bits : 0
DSP Elements : 0
@@ -1280,7 +1280,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|address_latch:addre
Library Name : work
Compilation Hierarchy Node : |inc_dec:b2v_inst_inc_dec|
LC Combinationals : 32 (14)
LC Combinationals : 30 (13)
LC Registers : 0 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1292,7 +1292,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|address_latch:addre
Library Name : work
Compilation Hierarchy Node : |inc_dec_2bit:b2v_dual_adder_0|
LC Combinationals : 4 (4)
LC Combinationals : 3 (3)
LC Registers : 0 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1376,7 +1376,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|address_pins:addres
Library Name : work
Compilation Hierarchy Node : |alu:alu_|
LC Combinationals : 130 (77)
LC Combinationals : 130 (76)
LC Registers : 20 (20)
Memory Bits : 0
DSP Elements : 0
@@ -1400,7 +1400,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|alu:alu_|alu_bit_se
Library Name : work
Compilation Hierarchy Node : |alu_core:b2v_core|
LC Combinationals : 20 (0)
LC Combinationals : 21 (0)
LC Registers : 0 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1424,7 +1424,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|alu:alu_|alu_core:b
Library Name : work
Compilation Hierarchy Node : |alu_slice:b2v_alu_slice_bit_1|
LC Combinationals : 4 (4)
LC Combinationals : 5 (5)
LC Registers : 0 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1544,7 +1544,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|alu_control:alu_con
Library Name : work
Compilation Hierarchy Node : |alu_flags:alu_flags_|
LC Combinationals : 63 (63)
LC Combinationals : 60 (60)
LC Registers : 10 (10)
Memory Bits : 0
DSP Elements : 0
@@ -1604,7 +1604,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|data_switch:sw2_
Library Name : work
Compilation Hierarchy Node : |data_switch_mask:sw1_|
LC Combinationals : 2 (2)
LC Combinationals : 3 (3)
LC Registers : 0 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1628,7 +1628,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|decode_state:decode
Library Name : work
Compilation Hierarchy Node : |execute:execute_|
LC Combinationals : 933 (933)
LC Combinationals : 926 (926)
LC Registers : 0 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1712,7 +1712,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|reg_control:reg_con
Library Name : work
Compilation Hierarchy Node : |reg_file:reg_file_|
LC Combinationals : 282 (273)
LC Combinationals : 283 (273)
LC Registers : 224 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1748,7 +1748,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|reg_file:reg_file_|
Library Name : work
Compilation Hierarchy Node : |reg_latch:b2v_latch_af_hi|
LC Combinationals : 8 (8)
LC Combinationals : 6 (6)
LC Registers : 8 (8)
Memory Bits : 0
DSP Elements : 0
@@ -1868,7 +1868,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|reg_file:reg_file_|
Library Name : work
Compilation Hierarchy Node : |reg_latch:b2v_latch_hl2_hi|
LC Combinationals : 0 (0)
LC Combinationals : 2 (2)
LC Registers : 8 (8)
Memory Bits : 0
DSP Elements : 0
@@ -2048,7 +2048,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|reg_file:reg_file_|
Library Name : work
Compilation Hierarchy Node : |reg_latch:b2v_latch_wz_lo|
LC Combinationals : 0 (0)
LC Combinationals : 1 (1)
LC Registers : 8 (8)
Memory Bits : 0
DSP Elements : 0
@@ -2241,9 +2241,9 @@ state.Idle : 1
; z80_top_direct_n:z80_|clk_delay:clk_delay_|hold_clk_busrq_ALTERA_SYNTHESIZED ; Stuck at GND due to stuck port data_in ;
; ram16:ram0|altsyncram:altsyncram_component|altsyncram_7ti2:auto_generated|address_reg_b[0] ; Stuck at GND due to stuck port data_in ;
; ram16:ram0|altsyncram:altsyncram_component|altsyncram_7ti2:auto_generated|out_address_reg_b[0] ; Stuck at GND due to stuck port data_in ;
; rom0:rom|altsyncram:altsyncram_component|altsyncram_qh91:auto_generated|out_address_reg_a[0] ; Merged with ram16:ram0|altsyncram:altsyncram_component|altsyncram_7ti2:auto_generated|out_address_reg_a[0] ;
; rom0:rom|altsyncram:altsyncram_component|altsyncram_qh91:auto_generated|out_address_reg_a[0] ; Merged with ram32:ram1|altsyncram:altsyncram_component|altsyncram_g9i1:auto_generated|out_address_reg_a[0] ;
; ula:ula_|pcm_outr[14] ; Merged with ula:ula_|pcm_outl[14] ;
; rom0:rom|altsyncram:altsyncram_component|altsyncram_qh91:auto_generated|address_reg_a[0] ; Merged with ram16:ram0|altsyncram:altsyncram_component|altsyncram_7ti2:auto_generated|address_reg_a[0] ;
; rom0:rom|altsyncram:altsyncram_component|altsyncram_qh91:auto_generated|address_reg_a[0] ; Merged with ram32:ram1|altsyncram:altsyncram_component|altsyncram_g9i1:auto_generated|address_reg_a[0] ;
; ula:ula_|pcm_outr[13] ; Merged with ula:ula_|pcm_outl[13] ;
; ula:ula_|pcm_outr[12] ; Merged with ula:ula_|pcm_outl[12] ;
; ula:ula_|i2c_loader:i2c_loader_|retries ; Stuck at GND due to stuck port data_in ;
@@ -2290,7 +2290,7 @@ Registers Removed due to This Register : ula:ula_|i2c_loader:i2c_loader_|nak
+----------------------------------------------------------+---------+
; ula:ula_|i2s_intf:i2s_intf_|bitcount[4] ; 4 ;
; ula:ula_|i2s_intf:i2s_intf_|bitcount[0] ; 2 ;
; z80_top_direct_n:z80_|resets:resets_|SYNTHESIZED_WIRE_12 ; 138 ;
; z80_top_direct_n:z80_|resets:resets_|SYNTHESIZED_WIRE_12 ; 139 ;
; ula:ula_|i2s_intf:i2s_intf_|lrdivider[9] ; 2 ;
; ula:ula_|i2s_intf:i2s_intf_|lrdivider[7] ; 2 ;
; ula:ula_|i2s_intf:i2s_intf_|lrdivider[6] ; 2 ;
@@ -2308,40 +2308,40 @@ Registers Removed due to This Register : ula:ula_|i2c_loader:i2c_loader_|nak
; ula:ula_|zx_keyboard:zx_keyboard_|keys[5][1] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[6][1] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[7][1] ; 2 ;
; z80_top_direct_n:z80_|sequencer:sequencer_|DFFE_T1_ff ; 59 ;
; z80_top_direct_n:z80_|sequencer:sequencer_|DFFE_T1_ff ; 58 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[1][2] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[0][2] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[3][2] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[2][2] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[0][2] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[5][2] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[4][2] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[7][2] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[6][2] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[1][0] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[0][0] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[3][0] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[2][0] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[1][0] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[5][0] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[4][0] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[7][0] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[6][0] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[1][3] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[0][3] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[3][3] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[2][3] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[3][3] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[5][3] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[4][3] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[6][3] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[7][3] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[1][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[6][3] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[0][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[3][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[2][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[1][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[5][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[4][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[7][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[6][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[5][4] ; 2 ;
; z80_top_direct_n:z80_|sequencer:sequencer_|DFFE_M1_ff ; 68 ;
; z80_top_direct_n:z80_|sequencer:sequencer_|DFFE_M1_ff ; 61 ;
; z80_top_direct_n:z80_|resets:resets_|x1 ; 2 ;
; z80_top_direct_n:z80_|fpga_reset ; 2 ;
; z80_top_direct_n:z80_|memory_ifc:memory_ifc_|DFFE_m1_ff1 ; 1 ;
@@ -4948,7 +4948,7 @@ Details : Input port expression (16 bits) is wider than the input port (14 bits
Info: *******************************************************************
Info: Running Quartus II 32-bit Analysis & Synthesis
Info: Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
Info: Processing started: Fri Apr 1 18:55:04 2022
Info: Processing started: Sat Apr 2 15:52:58 2022
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off spectrum -c spectrum
Warning (20028): Parallel compilation is not licensed and has been disabled
Info (12021): Found 1 design units, including 1 entities, in source file spectrum.sv
@@ -5389,17 +5389,17 @@ Info (16010): Generating hard_block partition "hard_block:auto_generated_inst"
Warning (21074): Design contains 2 input pin(s) that do not drive logic
Warning (15610): No output dependent on input pin "SW[0]"
Warning (15610): No output dependent on input pin "SW[3]"
Info (21057): Implemented 2747 device resources after synthesis - the final resource count might be different
Info (21057): Implemented 2734 device resources after synthesis - the final resource count might be different
Info (21058): Implemented 11 input pins
Info (21059): Implemented 62 output pins
Info (21060): Implemented 2 bidirectional pins
Info (21061): Implemented 2607 logic cells
Info (21061): Implemented 2594 logic cells
Info (21064): Implemented 64 RAM segments
Info (21065): Implemented 1 PLLs
Info: Quartus II 32-bit Analysis & Synthesis was successful. 0 errors, 110 warnings
Info: Peak virtual memory: 441 megabytes
Info: Processing ended: Fri Apr 1 18:55:17 2022
Info: Elapsed time: 00:00:13
Info: Processing ended: Sat Apr 2 15:53:10 2022
Info: Elapsed time: 00:00:12
Info: Total CPU time (on all processors): 00:00:13
output_files/spectrum.map.summary
+3 -3
View File
@@ -1,10 +1,10 @@
Analysis & Synthesis Status : Successful - Fri Apr 1 18:55:17 2022
Analysis & Synthesis Status : Successful - Sat Apr 2 15:53:10 2022
Quartus II 32-bit Version : 13.1.0 Build 162 10/23/2013 SJ Web Edition
Revision Name : spectrum
Top-level Entity Name : spectrum
Family : Cyclone IV E
Total logic elements : 2,537
Total combinational functions : 2,269
Total logic elements : 2,523
Total combinational functions : 2,255
Dedicated logic registers : 592
Total registers : 592
Total pins : 75
output_files/spectrum.sof
BIN
View File
Binary file not shown.
output_files/spectrum.sta.rpt
+20262 -20256
View File
File diff suppressed because it is too large Load Diff
output_files/spectrum.sta.summary
+49 -49
View File
@@ -3,43 +3,43 @@ TimeQuest Timing Analyzer Summary
------------------------------------------------------------
Type : Slow 1200mV 85C Model Setup 'CLOCK_50'
Slack : -18.123
TNS : -549.338
Slack : -18.425
TNS : -546.891
Type : Slow 1200mV 85C Model Setup 'ula_|pll_|altpll_component|auto_generated|pll1|clk[0]'
Slack : -7.533
TNS : -284.813
Slack : -6.923
TNS : -271.506
Type : Slow 1200mV 85C Model Setup 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : -4.740
TNS : -42.810
Slack : -4.745
TNS : -42.191
Type : Slow 1200mV 85C Model Setup 'ula_|pll_|altpll_component|auto_generated|pll1|clk[1]'
Slack : -2.914
TNS : -2.914
Type : Slow 1200mV 85C Model Hold 'CLOCK_50'
Slack : 0.210
TNS : 0.000
Slack : -2.915
TNS : -2.915
Type : Slow 1200mV 85C Model Hold 'ula_|pll_|altpll_component|auto_generated|pll1|clk[1]'
Slack : 0.342
TNS : 0.000
Type : Slow 1200mV 85C Model Hold 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : 0.344
Slack : 0.342
TNS : 0.000
Type : Slow 1200mV 85C Model Hold 'ula_|pll_|altpll_component|auto_generated|pll1|clk[0]'
Slack : 0.357
TNS : 0.000
Type : Slow 1200mV 85C Model Hold 'CLOCK_50'
Slack : 0.517
TNS : 0.000
Type : Slow 1200mV 85C Model Recovery 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : -6.223
TNS : -459.348
Slack : -6.263
TNS : -464.840
Type : Slow 1200mV 85C Model Removal 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : 3.698
Slack : 3.657
TNS : 0.000
Type : Slow 1200mV 85C Model Minimum Pulse Width 'CLOCK_50'
@@ -51,7 +51,7 @@ Slack : 19.602
TNS : 0.000
Type : Slow 1200mV 85C Model Minimum Pulse Width 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : 20.595
Slack : 20.597
TNS : 0.000
Type : Slow 1200mV 85C Model Minimum Pulse Width 'ula_|pll_|altpll_component|auto_generated|pll1|clk[1]'
@@ -59,43 +59,43 @@ Slack : 35.503
TNS : 0.000
Type : Slow 1200mV 0C Model Setup 'CLOCK_50'
Slack : -17.311
TNS : -526.609
Slack : -17.572
TNS : -524.603
Type : Slow 1200mV 0C Model Setup 'ula_|pll_|altpll_component|auto_generated|pll1|clk[0]'
Slack : -6.686
TNS : -253.661
Slack : -6.192
TNS : -241.805
Type : Slow 1200mV 0C Model Setup 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : -4.428
TNS : -40.009
Slack : -4.414
TNS : -39.436
Type : Slow 1200mV 0C Model Setup 'ula_|pll_|altpll_component|auto_generated|pll1|clk[1]'
Slack : -2.785
TNS : -2.785
Slack : -2.786
TNS : -2.786
Type : Slow 1200mV 0C Model Hold 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : 0.297
TNS : 0.000
Type : Slow 1200mV 0C Model Hold 'ula_|pll_|altpll_component|auto_generated|pll1|clk[1]'
Slack : 0.298
TNS : 0.000
Type : Slow 1200mV 0C Model Hold 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : 0.300
TNS : 0.000
Type : Slow 1200mV 0C Model Hold 'CLOCK_50'
Slack : 0.304
TNS : 0.000
Type : Slow 1200mV 0C Model Hold 'ula_|pll_|altpll_component|auto_generated|pll1|clk[0]'
Slack : 0.311
TNS : 0.000
Type : Slow 1200mV 0C Model Hold 'CLOCK_50'
Slack : 0.467
TNS : 0.000
Type : Slow 1200mV 0C Model Recovery 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : -5.744
TNS : -423.582
Slack : -5.773
TNS : -427.930
Type : Slow 1200mV 0C Model Removal 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : 3.374
Slack : 3.347
TNS : 0.000
Type : Slow 1200mV 0C Model Minimum Pulse Width 'CLOCK_50'
@@ -103,11 +103,11 @@ Slack : 9.489
TNS : 0.000
Type : Slow 1200mV 0C Model Minimum Pulse Width 'ula_|pll_|altpll_component|auto_generated|pll1|clk[0]'
Slack : 19.600
Slack : 19.601
TNS : 0.000
Type : Slow 1200mV 0C Model Minimum Pulse Width 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : 20.591
Slack : 20.590
TNS : 0.000
Type : Slow 1200mV 0C Model Minimum Pulse Width 'ula_|pll_|altpll_component|auto_generated|pll1|clk[1]'
@@ -115,24 +115,24 @@ Slack : 35.491
TNS : 0.000
Type : Fast 1200mV 0C Model Setup 'CLOCK_50'
Slack : -14.971
TNS : -442.545
Slack : -15.171
TNS : -440.252
Type : Fast 1200mV 0C Model Setup 'ula_|pll_|altpll_component|auto_generated|pll1|clk[0]'
Slack : -4.979
TNS : -171.124
Slack : -4.743
TNS : -163.399
Type : Fast 1200mV 0C Model Setup 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : -3.775
TNS : -35.541
Slack : -3.815
TNS : -35.260
Type : Fast 1200mV 0C Model Setup 'ula_|pll_|altpll_component|auto_generated|pll1|clk[1]'
Slack : -2.784
TNS : -2.784
Type : Fast 1200mV 0C Model Hold 'CLOCK_50'
Slack : -0.053
TNS : -0.089
Slack : 0.112
TNS : 0.000
Type : Fast 1200mV 0C Model Hold 'ula_|pll_|altpll_component|auto_generated|pll1|clk[1]'
Slack : 0.177
@@ -147,11 +147,11 @@ Slack : 0.186
TNS : 0.000
Type : Fast 1200mV 0C Model Recovery 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : -4.693
TNS : -358.284
Slack : -4.728
TNS : -362.420
Type : Fast 1200mV 0C Model Removal 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : 2.518
Slack : 2.503
TNS : 0.000
Type : Fast 1200mV 0C Model Minimum Pulse Width 'CLOCK_50'