Working version with loader from schmidt trigger

This commit is contained in:
2022-04-01 18:58:14 +03:00
parent 61ed88ce64
commit d20be0fefc
111 changed files with 411599 additions and 407028 deletions
+64 -68
View File
@@ -1,5 +1,5 @@
Analysis & Synthesis report for spectrum
Thu Mar 31 14:03:50 2022
Fri Apr 1 18:55:17 2022
Quartus II 32-bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
@@ -70,16 +70,16 @@ applicable agreement for further details.
+---------------------------------------------------------------------------------+
; Analysis & Synthesis Summary ;
+------------------------------------+--------------------------------------------+
; Analysis & Synthesis Status ; Successful - Thu Mar 31 14:03:50 2022 ;
; Analysis & Synthesis Status ; Successful - Fri Apr 1 18:55:17 2022 ;
; Quartus II 32-bit Version ; 13.1.0 Build 162 10/23/2013 SJ Web Edition ;
; Revision Name ; spectrum ;
; Top-level Entity Name ; spectrum ;
; Family ; Cyclone IV E ;
; Total logic elements ; 2,530 ;
; Total combinational functions ; 2,262 ;
; Total logic elements ; 2,537 ;
; Total combinational functions ; 2,269 ;
; Dedicated logic registers ; 592 ;
; Total registers ; 592 ;
; Total pins ; 74 ;
; Total pins ; 75 ;
; Total virtual pins ; 0 ;
; Total memory bits ; 524,288 ;
; Embedded Multiplier 9-bit elements ; 0 ;
@@ -935,32 +935,32 @@ Library :
+---------------------------------------------+---------------------------------+
; Resource ; Usage ;
+---------------------------------------------+---------------------------------+
; Estimated Total logic elements ; 2,530 ;
; Estimated Total logic elements ; 2,537 ;
; ; ;
; Total combinational functions ; 2262 ;
; Total combinational functions ; 2269 ;
; Logic element usage by number of LUT inputs ; ;
; -- 4 input functions ; 1645 ;
; -- 3 input functions ; 364 ;
; -- <=2 input functions ; 253 ;
; -- 4 input functions ; 1640 ;
; -- 3 input functions ; 385 ;
; -- <=2 input functions ; 244 ;
; ; ;
; Logic elements by mode ; ;
; -- normal mode ; 2209 ;
; -- normal mode ; 2216 ;
; -- arithmetic mode ; 53 ;
; ; ;
; Total registers ; 592 ;
; -- Dedicated logic registers ; 592 ;
; -- I/O registers ; 0 ;
; ; ;
; I/O pins ; 74 ;
; I/O pins ; 75 ;
; Total memory bits ; 524288 ;
; Embedded Multiplier 9-bit elements ; 0 ;
; Total PLLs ; 1 ;
; -- PLLs ; 1 ;
; ; ;
; Maximum fan-out node ; ula:ula_|clocks:clocks_|clk_cpu ;
; Maximum fan-out ; 472 ;
; Total fan-out ; 11497 ;
; Average fan-out ; 3.75 ;
; Maximum fan-out ; 436 ;
; Total fan-out ; 11524 ;
; Average fan-out ; 3.74 ;
+---------------------------------------------+---------------------------------+
@@ -968,13 +968,13 @@ Library :
; Analysis & Synthesis Resource Utilization by Entity ;
+--------------------------------------------------------------------------------+
Compilation Hierarchy Node : |spectrum
LC Combinationals : 2262 (87)
LC Combinationals : 2269 (98)
LC Registers : 592 (0)
Memory Bits : 524288
DSP Elements : 0
DSP 9x9 : 0
DSP 18x18 : 0
Pins : 74
Pins : 75
Virtual Pins : 0
Full Hierarchy Name : |spectrum
Library Name : work
@@ -1028,7 +1028,7 @@ Full Hierarchy Name : |spectrum|ram16:ram0|altsyncram:altsyncram_componen
Library Name : work
Compilation Hierarchy Node : |ram32:ram1|
LC Combinationals : 24 (0)
LC Combinationals : 16 (0)
LC Registers : 4 (0)
Memory Bits : 262144
DSP Elements : 0
@@ -1040,7 +1040,7 @@ Full Hierarchy Name : |spectrum|ram32:ram1
Library Name : work
Compilation Hierarchy Node : |altsyncram:altsyncram_component|
LC Combinationals : 24 (0)
LC Combinationals : 16 (0)
LC Registers : 4 (0)
Memory Bits : 262144
DSP Elements : 0
@@ -1052,7 +1052,7 @@ Full Hierarchy Name : |spectrum|ram32:ram1|altsyncram:altsyncram_componen
Library Name : work
Compilation Hierarchy Node : |altsyncram_g9i1:auto_generated|
LC Combinationals : 24 (0)
LC Combinationals : 16 (0)
LC Registers : 4 (4)
Memory Bits : 262144
DSP Elements : 0
@@ -1088,7 +1088,7 @@ Full Hierarchy Name : |spectrum|ram32:ram1|altsyncram:altsyncram_componen
Library Name : work
Compilation Hierarchy Node : |mux_6nb:mux2|
LC Combinationals : 16 (16)
LC Combinationals : 8 (8)
LC Registers : 0 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1136,7 +1136,7 @@ Full Hierarchy Name : |spectrum|rom0:rom|altsyncram:altsyncram_component|
Library Name : work
Compilation Hierarchy Node : |ula:ula_|
LC Combinationals : 418 (4)
LC Combinationals : 420 (4)
LC Registers : 224 (7)
Memory Bits : 0
DSP Elements : 0
@@ -1244,7 +1244,7 @@ Full Hierarchy Name : |spectrum|ula:ula_|video:video_
Library Name : work
Compilation Hierarchy Node : |zx_keyboard:zx_keyboard_|
LC Combinationals : 148 (148)
LC Combinationals : 150 (150)
LC Registers : 43 (43)
Memory Bits : 0
DSP Elements : 0
@@ -1256,7 +1256,7 @@ Full Hierarchy Name : |spectrum|ula:ula_|zx_keyboard:zx_keyboard_
Library Name : work
Compilation Hierarchy Node : |z80_top_direct_n:z80_|
LC Combinationals : 1731 (2)
LC Combinationals : 1733 (2)
LC Registers : 362 (1)
Memory Bits : 0
DSP Elements : 0
@@ -1268,7 +1268,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_
Library Name : work
Compilation Hierarchy Node : |address_latch:address_latch_|
LC Combinationals : 47 (16)
LC Combinationals : 48 (16)
LC Registers : 16 (16)
Memory Bits : 0
DSP Elements : 0
@@ -1280,7 +1280,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|address_latch:addre
Library Name : work
Compilation Hierarchy Node : |inc_dec:b2v_inst_inc_dec|
LC Combinationals : 31 (14)
LC Combinationals : 32 (14)
LC Registers : 0 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1292,7 +1292,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|address_latch:addre
Library Name : work
Compilation Hierarchy Node : |inc_dec_2bit:b2v_dual_adder_0|
LC Combinationals : 3 (3)
LC Combinationals : 4 (4)
LC Registers : 0 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1376,7 +1376,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|address_pins:addres
Library Name : work
Compilation Hierarchy Node : |alu:alu_|
LC Combinationals : 130 (76)
LC Combinationals : 130 (77)
LC Registers : 20 (20)
Memory Bits : 0
DSP Elements : 0
@@ -1400,7 +1400,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|alu:alu_|alu_bit_se
Library Name : work
Compilation Hierarchy Node : |alu_core:b2v_core|
LC Combinationals : 21 (0)
LC Combinationals : 20 (0)
LC Registers : 0 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1448,7 +1448,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|alu:alu_|alu_core:b
Library Name : work
Compilation Hierarchy Node : |alu_slice:b2v_alu_slice_bit_3|
LC Combinationals : 6 (6)
LC Combinationals : 5 (5)
LC Registers : 0 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1544,7 +1544,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|alu_control:alu_con
Library Name : work
Compilation Hierarchy Node : |alu_flags:alu_flags_|
LC Combinationals : 62 (62)
LC Combinationals : 63 (63)
LC Registers : 10 (10)
Memory Bits : 0
DSP Elements : 0
@@ -1604,7 +1604,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|data_switch:sw2_
Library Name : work
Compilation Hierarchy Node : |data_switch_mask:sw1_|
LC Combinationals : 3 (3)
LC Combinationals : 2 (2)
LC Registers : 0 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1628,7 +1628,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|decode_state:decode
Library Name : work
Compilation Hierarchy Node : |execute:execute_|
LC Combinationals : 931 (931)
LC Combinationals : 933 (933)
LC Registers : 0 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1712,7 +1712,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|reg_control:reg_con
Library Name : work
Compilation Hierarchy Node : |reg_file:reg_file_|
LC Combinationals : 283 (274)
LC Combinationals : 282 (273)
LC Registers : 224 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1748,7 +1748,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|reg_file:reg_file_|
Library Name : work
Compilation Hierarchy Node : |reg_latch:b2v_latch_af_hi|
LC Combinationals : 6 (6)
LC Combinationals : 8 (8)
LC Registers : 8 (8)
Memory Bits : 0
DSP Elements : 0
@@ -1832,7 +1832,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|reg_file:reg_file_|
Library Name : work
Compilation Hierarchy Node : |reg_latch:b2v_latch_de2_lo|
LC Combinationals : 1 (1)
LC Combinationals : 0 (0)
LC Registers : 8 (8)
Memory Bits : 0
DSP Elements : 0
@@ -1868,7 +1868,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|reg_file:reg_file_|
Library Name : work
Compilation Hierarchy Node : |reg_latch:b2v_latch_hl2_hi|
LC Combinationals : 2 (2)
LC Combinationals : 0 (0)
LC Registers : 8 (8)
Memory Bits : 0
DSP Elements : 0
@@ -1880,7 +1880,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|reg_file:reg_file_|
Library Name : work
Compilation Hierarchy Node : |reg_latch:b2v_latch_hl2_lo|
LC Combinationals : 0 (0)
LC Combinationals : 1 (1)
LC Registers : 8 (8)
Memory Bits : 0
DSP Elements : 0
@@ -2290,7 +2290,7 @@ Registers Removed due to This Register : ula:ula_|i2c_loader:i2c_loader_|nak
+----------------------------------------------------------+---------+
; ula:ula_|i2s_intf:i2s_intf_|bitcount[4] ; 4 ;
; ula:ula_|i2s_intf:i2s_intf_|bitcount[0] ; 2 ;
; z80_top_direct_n:z80_|resets:resets_|SYNTHESIZED_WIRE_12 ; 136 ;
; z80_top_direct_n:z80_|resets:resets_|SYNTHESIZED_WIRE_12 ; 138 ;
; ula:ula_|i2s_intf:i2s_intf_|lrdivider[9] ; 2 ;
; ula:ula_|i2s_intf:i2s_intf_|lrdivider[7] ; 2 ;
; ula:ula_|i2s_intf:i2s_intf_|lrdivider[6] ; 2 ;
@@ -2300,7 +2300,6 @@ Registers Removed due to This Register : ula:ula_|i2c_loader:i2c_loader_|nak
; ula:ula_|i2s_intf:i2s_intf_|bdivider[0] ; 6 ;
; ula:ula_|i2s_intf:i2s_intf_|bdivider[4] ; 2 ;
; ula:ula_|i2s_intf:i2s_intf_|bdivider[2] ; 2 ;
; z80_top_direct_n:z80_|sequencer:sequencer_|DFFE_T1_ff ; 59 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[0][1] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[1][1] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[2][1] ; 2 ;
@@ -2309,6 +2308,7 @@ Registers Removed due to This Register : ula:ula_|i2c_loader:i2c_loader_|nak
; ula:ula_|zx_keyboard:zx_keyboard_|keys[5][1] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[6][1] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[7][1] ; 2 ;
; z80_top_direct_n:z80_|sequencer:sequencer_|DFFE_T1_ff ; 59 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[1][2] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[0][2] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[3][2] ; 2 ;
@@ -2331,16 +2331,16 @@ Registers Removed due to This Register : ula:ula_|i2c_loader:i2c_loader_|nak
; ula:ula_|zx_keyboard:zx_keyboard_|keys[2][3] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[5][3] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[4][3] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[7][3] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[6][3] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[7][3] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[1][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[0][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[3][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[2][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[5][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[4][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[7][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[6][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[5][4] ; 2 ;
; z80_top_direct_n:z80_|sequencer:sequencer_|DFFE_M1_ff ; 68 ;
; z80_top_direct_n:z80_|resets:resets_|x1 ; 2 ;
; z80_top_direct_n:z80_|fpga_reset ; 2 ;
@@ -2378,7 +2378,7 @@ Baseline Area : 4 LEs
Area if Restructured : 2 LEs
Saving if Restructured : 2 LEs
Registered : Yes
Example Multiplexer Output : |spectrum|ula:ula_|i2s_intf:i2s_intf_|bdivider[3]
Example Multiplexer Output : |spectrum|ula:ula_|i2s_intf:i2s_intf_|bdivider[1]
Multiplexer Inputs : 6:1
Bus Width : 5 bits
@@ -2402,7 +2402,7 @@ Baseline Area : 42 LEs
Area if Restructured : 14 LEs
Saving if Restructured : 28 LEs
Registered : Yes
Example Multiplexer Output : |spectrum|ula:ula_|i2s_intf:i2s_intf_|shiftreg[8]
Example Multiplexer Output : |spectrum|ula:ula_|i2s_intf:i2s_intf_|shiftreg[4]
Multiplexer Inputs : 5:1
Bus Width : 3 bits
@@ -2434,7 +2434,7 @@ Baseline Area : 10 LEs
Area if Restructured : 4 LEs
Saving if Restructured : 6 LEs
Registered : Yes
Example Multiplexer Output : |spectrum|ula:ula_|i2c_loader:i2c_loader_|shiftreg[5]
Example Multiplexer Output : |spectrum|ula:ula_|i2c_loader:i2c_loader_|shiftreg[6]
Multiplexer Inputs : 10:1
Bus Width : 2 bits
@@ -2458,7 +2458,7 @@ Baseline Area : 72 LEs
Area if Restructured : 52 LEs
Saving if Restructured : 20 LEs
Registered : Yes
Example Multiplexer Output : |spectrum|ula:ula_|i2c_loader:i2c_loader_|shiftreg[3]
Example Multiplexer Output : |spectrum|ula:ula_|i2c_loader:i2c_loader_|shiftreg[4]
Multiplexer Inputs : 3:1
Bus Width : 16 bits
@@ -2466,7 +2466,7 @@ Baseline Area : 32 LEs
Area if Restructured : 32 LEs
Saving if Restructured : 0 LEs
Registered : Yes
Example Multiplexer Output : |spectrum|z80_top_direct_n:z80_|address_pins:address_pins_|DFFE_apin_latch[6]
Example Multiplexer Output : |spectrum|z80_top_direct_n:z80_|address_pins:address_pins_|DFFE_apin_latch[5]
Multiplexer Inputs : 4:1
Bus Width : 3 bits
@@ -2498,7 +2498,7 @@ Baseline Area : 8 LEs
Area if Restructured : 6 LEs
Saving if Restructured : 2 LEs
Registered : No
Example Multiplexer Output : |spectrum|Mux0
Example Multiplexer Output : |spectrum|Mux2
Multiplexer Inputs : 8:1
Bus Width : 6 bits
@@ -2506,7 +2506,7 @@ Baseline Area : 30 LEs
Area if Restructured : 24 LEs
Saving if Restructured : 6 LEs
Registered : No
Example Multiplexer Output : |spectrum|Selector1
Example Multiplexer Output : |spectrum|Selector3
Multiplexer Inputs : 9:1
Bus Width : 2 bits
@@ -2514,7 +2514,7 @@ Baseline Area : 12 LEs
Area if Restructured : 6 LEs
Saving if Restructured : 6 LEs
Registered : No
Example Multiplexer Output : |spectrum|ula:ula_|i2c_loader:i2c_loader_|state.Ack
Example Multiplexer Output : |spectrum|ula:ula_|i2c_loader:i2c_loader_|state.Idle
Multiplexer Inputs : 11:1
Bus Width : 2 bits
@@ -3357,7 +3357,7 @@ Value : 7
Type : Signed Integer
Parameter Name : CLK0_MULTIPLY_BY
Value : 72
Value : 1007
Type : Signed Integer
Parameter Name : CLK9_DIVIDE_BY
@@ -3397,7 +3397,7 @@ Value : 25
Type : Signed Integer
Parameter Name : CLK0_DIVIDE_BY
Value : 143
Value : 2000
Type : Signed Integer
Parameter Name : CLK9_PHASE_SHIFT
@@ -4883,11 +4883,6 @@ Details : Connected to dangling logic. Logic that only feeds a dangling port wi
+--------------------------------------------------------------------------------+
; Port Connectivity Checks: "ula:ula_" ;
+--------------------------------------------------------------------------------+
Port : clk_vram
Type : Output
Severity : Info
Details : Connected to dangling logic. Logic that only feeds a dangling port will be removed.
Port : pressed
Type : Output
Severity : Info
@@ -4953,7 +4948,7 @@ Details : Input port expression (16 bits) is wider than the input port (14 bits
Info: *******************************************************************
Info: Running Quartus II 32-bit Analysis & Synthesis
Info: Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
Info: Processing started: Thu Mar 31 14:03:37 2022
Info: Processing started: Fri Apr 1 18:55:04 2022
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off spectrum -c spectrum
Warning (20028): Parallel compilation is not licensed and has been disabled
Info (12021): Found 1 design units, including 1 entities, in source file spectrum.sv
@@ -5064,8 +5059,10 @@ Info (12021): Found 1 design units, including 1 entities, in source file rom_scr
Info (12023): Found entity 1: rom_scr
Info (12021): Found 1 design units, including 1 entities, in source file pll_video.v
Info (12023): Found entity 1: pll_video
Info (12021): Found 1 design units, including 1 entities, in source file ram_video.v
Info (12023): Found entity 1: ram_video
Info (12127): Elaborating entity "spectrum" for the top level hierarchy
Warning (10034): Output port "LED[7..3]" at spectrum.sv(1) has no driver
Warning (10034): Output port "LED[7..4]" at spectrum.sv(1) has no driver
Warning (10034): Output port "LED[1]" at spectrum.sv(1) has no driver
Warning (10034): Output port "GPIO_1[33..32]" at spectrum.sv(20) has no driver
Info (12128): Elaborating entity "rom0" for hierarchy "rom0:rom"
@@ -5169,9 +5166,9 @@ Info (12128): Elaborating entity "altpll" for hierarchy "ula:ula_|pll:pll_|altpl
Info (12130): Elaborated megafunction instantiation "ula:ula_|pll:pll_|altpll:altpll_component"
Info (12133): Instantiated megafunction "ula:ula_|pll:pll_|altpll:altpll_component" with the following parameter:
Info (12134): Parameter "bandwidth_type" = "AUTO"
Info (12134): Parameter "clk0_divide_by" = "143"
Info (12134): Parameter "clk0_divide_by" = "2000"
Info (12134): Parameter "clk0_duty_cycle" = "50"
Info (12134): Parameter "clk0_multiply_by" = "72"
Info (12134): Parameter "clk0_multiply_by" = "1007"
Info (12134): Parameter "clk0_phase_shift" = "0"
Info (12134): Parameter "clk1_divide_by" = "25"
Info (12134): Parameter "clk1_duty_cycle" = "50"
@@ -5377,7 +5374,6 @@ Info (13000): Registers with preset signals will power-up high
Info (13003): DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back
Warning (13024): Output pins are stuck at VCC or GND
Warning (13410): Pin "LED[1]" is stuck at GND
Warning (13410): Pin "LED[3]" is stuck at GND
Warning (13410): Pin "LED[4]" is stuck at GND
Warning (13410): Pin "LED[5]" is stuck at GND
Warning (13410): Pin "LED[6]" is stuck at GND
@@ -5393,16 +5389,16 @@ Info (16010): Generating hard_block partition "hard_block:auto_generated_inst"
Warning (21074): Design contains 2 input pin(s) that do not drive logic
Warning (15610): No output dependent on input pin "SW[0]"
Warning (15610): No output dependent on input pin "SW[3]"
Info (21057): Implemented 2739 device resources after synthesis - the final resource count might be different
Info (21058): Implemented 10 input pins
Info (21057): Implemented 2747 device resources after synthesis - the final resource count might be different
Info (21058): Implemented 11 input pins
Info (21059): Implemented 62 output pins
Info (21060): Implemented 2 bidirectional pins
Info (21061): Implemented 2600 logic cells
Info (21061): Implemented 2607 logic cells
Info (21064): Implemented 64 RAM segments
Info (21065): Implemented 1 PLLs
Info: Quartus II 32-bit Analysis & Synthesis was successful. 0 errors, 111 warnings
Info: Peak virtual memory: 442 megabytes
Info: Processing ended: Thu Mar 31 14:03:50 2022
Info: Quartus II 32-bit Analysis & Synthesis was successful. 0 errors, 110 warnings
Info: Peak virtual memory: 441 megabytes
Info: Processing ended: Fri Apr 1 18:55:17 2022
Info: Elapsed time: 00:00:13
Info: Total CPU time (on all processors): 00:00:13