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Working version with loader from schmidt trigger

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This commit is contained in:
Adrian Scripca
2022-04-01 18:58:14 +03:00
parent 61ed88ce64
commit d20be0fefc
111 changed files with 411599 additions and 407028 deletions
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output_files/greybox_tmp/cbx_args.txt
+34 -58
View File
@@ -1,60 +1,36 @@
BANDWIDTH_TYPE=AUTO
CLK0_DIVIDE_BY=2000
CLK0_DUTY_CYCLE=50
CLK0_MULTIPLY_BY=1007
CLK0_PHASE_SHIFT=0
COMPENSATE_CLOCK=CLK0
INCLK0_INPUT_FREQUENCY=20000
ADDRESS_REG_B=CLOCK1
CLOCK_ENABLE_INPUT_A=BYPASS
CLOCK_ENABLE_INPUT_B=BYPASS
CLOCK_ENABLE_OUTPUT_A=BYPASS
CLOCK_ENABLE_OUTPUT_B=BYPASS
INDATA_REG_B=CLOCK1
INTENDED_DEVICE_FAMILY="Cyclone IV E"
LPM_TYPE=altpll
OPERATION_MODE=NORMAL
PLL_TYPE=AUTO
PORT_ACTIVECLOCK=PORT_UNUSED
PORT_ARESET=PORT_UNUSED
PORT_CLKBAD0=PORT_UNUSED
PORT_CLKBAD1=PORT_UNUSED
PORT_CLKLOSS=PORT_UNUSED
PORT_CLKSWITCH=PORT_UNUSED
PORT_CONFIGUPDATE=PORT_UNUSED
PORT_FBIN=PORT_UNUSED
PORT_INCLK0=PORT_USED
PORT_INCLK1=PORT_UNUSED
PORT_LOCKED=PORT_USED
PORT_PFDENA=PORT_UNUSED
PORT_PHASECOUNTERSELECT=PORT_UNUSED
PORT_PHASEDONE=PORT_UNUSED
PORT_PHASESTEP=PORT_UNUSED
PORT_PHASEUPDOWN=PORT_UNUSED
PORT_PLLENA=PORT_UNUSED
PORT_SCANACLR=PORT_UNUSED
PORT_SCANCLK=PORT_UNUSED
PORT_SCANCLKENA=PORT_UNUSED
PORT_SCANDATA=PORT_UNUSED
PORT_SCANDATAOUT=PORT_UNUSED
PORT_SCANDONE=PORT_UNUSED
PORT_SCANREAD=PORT_UNUSED
PORT_SCANWRITE=PORT_UNUSED
PORT_clk0=PORT_USED
PORT_clk1=PORT_UNUSED
PORT_clk2=PORT_UNUSED
PORT_clk3=PORT_UNUSED
PORT_clk4=PORT_UNUSED
PORT_clk5=PORT_UNUSED
PORT_clkena0=PORT_UNUSED
PORT_clkena1=PORT_UNUSED
PORT_clkena2=PORT_UNUSED
PORT_clkena3=PORT_UNUSED
PORT_clkena4=PORT_UNUSED
PORT_clkena5=PORT_UNUSED
PORT_extclk0=PORT_UNUSED
PORT_extclk1=PORT_UNUSED
PORT_extclk2=PORT_UNUSED
PORT_extclk3=PORT_UNUSED
SELF_RESET_ON_LOSS_LOCK=OFF
WIDTH_CLOCK=5
LPM_TYPE=altsyncram
NUMWORDS_A=16384
NUMWORDS_B=16384
OPERATION_MODE=BIDIR_DUAL_PORT
OUTDATA_ACLR_A=NONE
OUTDATA_ACLR_B=NONE
OUTDATA_REG_A=CLOCK0
OUTDATA_REG_B=CLOCK1
POWER_UP_UNINITIALIZED=FALSE
READ_DURING_WRITE_MODE_PORT_A=NEW_DATA_NO_NBE_READ
READ_DURING_WRITE_MODE_PORT_B=NEW_DATA_NO_NBE_READ
WIDTHAD_A=14
WIDTHAD_B=14
WIDTH_A=8
WIDTH_B=8
WIDTH_BYTEENA_A=1
WIDTH_BYTEENA_B=1
WRCONTROL_WRADDRESS_REG_B=CLOCK1
DEVICE_FAMILY="Cyclone IV E"
CBX_AUTO_BLACKBOX=ALL
inclk
inclk
clk
locked
address_a
address_b
clock0
clock1
data_a
data_b
wren_a
wren_b
q_a
q_b
output_files/ram_video.qip
View File
output_files/spectrum.asm.rpt
+8 -8
View File
@@ -1,5 +1,5 @@
Assembler report for spectrum
Thu Mar 31 14:04:15 2022
Fri Apr 1 18:55:43 2022
Quartus II 32-bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
@@ -37,7 +37,7 @@ applicable agreement for further details.
+---------------------------------------------------------------+
; Assembler Summary ;
+-----------------------+---------------------------------------+
; Assembler Status ; Successful - Thu Mar 31 14:04:15 2022 ;
; Assembler Status ; Successful - Fri Apr 1 18:55:43 2022 ;
; Revision Name ; spectrum ;
; Top-level Entity Name ; spectrum ;
; Family ; Cyclone IV E ;
@@ -162,8 +162,8 @@ Default Value : On
; Option ; Setting ;
+----------------+-----------------------+
; Device ; EP4CE22F17C6 ;
; JTAG usercode ; 0x00559289 ;
; Checksum ; 0x00559289 ;
; JTAG usercode ; 0x0056423F ;
; Checksum ; 0x0056423F ;
+----------------+-----------------------+
@@ -173,14 +173,14 @@ Default Value : On
Info: *******************************************************************
Info: Running Quartus II 32-bit Assembler
Info: Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
Info: Processing started: Thu Mar 31 14:04:14 2022
Info: Processing started: Fri Apr 1 18:55:41 2022
Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off spectrum -c spectrum
Info (115031): Writing out detailed assembly data for power analysis
Info (115030): Assembler is generating device programming files
Info: Quartus II 32-bit Assembler was successful. 0 errors, 0 warnings
Info: Peak virtual memory: 375 megabytes
Info: Processing ended: Thu Mar 31 14:04:15 2022
Info: Elapsed time: 00:00:01
Info: Peak virtual memory: 385 megabytes
Info: Processing ended: Fri Apr 1 18:55:43 2022
Info: Elapsed time: 00:00:02
Info: Total CPU time (on all processors): 00:00:02
output_files/spectrum.done
+1 -1
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@@ -1 +1 @@
Thu Mar 31 14:04:25 2022
Fri Apr 1 18:55:53 2022
output_files/spectrum.eda.rpt
+5 -5
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@@ -1,5 +1,5 @@
EDA Netlist Writer report for spectrum
Thu Mar 31 14:04:25 2022
Fri Apr 1 18:55:53 2022
Quartus II 32-bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
@@ -36,7 +36,7 @@ applicable agreement for further details.
+-------------------------------------------------------------------+
; EDA Netlist Writer Summary ;
+---------------------------+---------------------------------------+
; EDA Netlist Writer Status ; Successful - Thu Mar 31 14:04:25 2022 ;
; EDA Netlist Writer Status ; Successful - Fri Apr 1 18:55:53 2022 ;
; Revision Name ; spectrum ;
; Top-level Entity Name ; spectrum ;
; Family ; Cyclone IV E ;
@@ -88,7 +88,7 @@ applicable agreement for further details.
Info: *******************************************************************
Info: Running Quartus II 32-bit EDA Netlist Writer
Info: Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
Info: Processing started: Thu Mar 31 14:04:22 2022
Info: Processing started: Fri Apr 1 18:55:50 2022
Info: Command: quartus_eda --read_settings_files=off --write_settings_files=off spectrum -c spectrum
Info (204019): Generated file spectrum_6_1200mv_85c_slow.vo in folder "/home/benny/work/fpga/spectrum/simulation/modelsim/" for EDA simulation tool
Info (204019): Generated file spectrum_6_1200mv_0c_slow.vo in folder "/home/benny/work/fpga/spectrum/simulation/modelsim/" for EDA simulation tool
@@ -99,8 +99,8 @@ Info (204019): Generated file spectrum_6_1200mv_0c_v_slow.sdo in folder "/home/b
Info (204019): Generated file spectrum_min_1200mv_0c_v_fast.sdo in folder "/home/benny/work/fpga/spectrum/simulation/modelsim/" for EDA simulation tool
Info (204019): Generated file spectrum_v.sdo in folder "/home/benny/work/fpga/spectrum/simulation/modelsim/" for EDA simulation tool
Info: Quartus II 32-bit EDA Netlist Writer was successful. 0 errors, 0 warnings
Info: Peak virtual memory: 383 megabytes
Info: Processing ended: Thu Mar 31 14:04:25 2022
Info: Peak virtual memory: 380 megabytes
Info: Processing ended: Fri Apr 1 18:55:53 2022
Info: Elapsed time: 00:00:03
Info: Total CPU time (on all processors): 00:00:03
output_files/spectrum.fit.rpt
+1899 -1683
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File diff suppressed because it is too large Load Diff
output_files/spectrum.fit.summary
+4 -4
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@@ -1,15 +1,15 @@
Fitter Status : Successful - Thu Mar 31 14:04:11 2022
Fitter Status : Successful - Fri Apr 1 18:55:39 2022
Quartus II 32-bit Version : 13.1.0 Build 162 10/23/2013 SJ Web Edition
Revision Name : spectrum
Top-level Entity Name : spectrum
Family : Cyclone IV E
Device : EP4CE22F17C6
Timing Models : Final
Total logic elements : 2,383 / 22,320 ( 11 % )
Total combinational functions : 2,265 / 22,320 ( 10 % )
Total logic elements : 2,396 / 22,320 ( 11 % )
Total combinational functions : 2,272 / 22,320 ( 10 % )
Dedicated logic registers : 591 / 22,320 ( 3 % )
Total registers : 600
Total pins : 74 / 154 ( 48 % )
Total pins : 75 / 154 ( 49 % )
Total virtual pins : 0
Total memory bits : 524,288 / 608,256 ( 86 % )
Embedded Multiplier 9-bit elements : 0 / 132 ( 0 % )
output_files/spectrum.flow.rpt
+36 -18
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@@ -1,5 +1,5 @@
Flow report for spectrum
Thu Mar 31 14:04:25 2022
Fri Apr 1 18:55:53 2022
Quartus II 32-bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
@@ -40,18 +40,18 @@ applicable agreement for further details.
+---------------------------------------------------------------------------------+
; Flow Summary ;
+------------------------------------+--------------------------------------------+
; Flow Status ; Successful - Thu Mar 31 14:04:25 2022 ;
; Flow Status ; Successful - Fri Apr 1 18:55:53 2022 ;
; Quartus II 32-bit Version ; 13.1.0 Build 162 10/23/2013 SJ Web Edition ;
; Revision Name ; spectrum ;
; Top-level Entity Name ; spectrum ;
; Family ; Cyclone IV E ;
; Device ; EP4CE22F17C6 ;
; Timing Models ; Final ;
; Total logic elements ; 2,383 / 22,320 ( 11 % ) ;
; Total combinational functions ; 2,265 / 22,320 ( 10 % ) ;
; Total logic elements ; 2,396 / 22,320 ( 11 % ) ;
; Total combinational functions ; 2,272 / 22,320 ( 10 % ) ;
; Dedicated logic registers ; 591 / 22,320 ( 3 % ) ;
; Total registers ; 600 ;
; Total pins ; 74 / 154 ( 48 % ) ;
; Total pins ; 75 / 154 ( 49 % ) ;
; Total virtual pins ; 0 ;
; Total memory bits ; 524,288 / 608,256 ( 86 % ) ;
; Embedded Multiplier 9-bit elements ; 0 / 132 ( 0 % ) ;
@@ -64,7 +64,7 @@ applicable agreement for further details.
+-------------------+---------------------+
; Option ; Setting ;
+-------------------+---------------------+
; Start date & time ; 03/31/2022 14:03:37 ;
; Start date & time ; 04/01/2022 18:55:04 ;
; Main task ; Compilation ;
; Revision Name ; spectrum ;
+-------------------+---------------------+
@@ -74,7 +74,7 @@ applicable agreement for further details.
; Flow Non-Default Global Settings ;
+--------------------------------------------------------------------------------+
Assignment Name : COMPILER_SIGNATURE_ID
Value : 0.164872461727117
Value : 0.164882850457192
Default Value : --
Entity Name : --
Section Id : --
@@ -127,6 +127,12 @@ Default Value : --
Entity Name : --
Section Id : --
Assignment Name : IP_TOOL_NAME
Value : RAM: 2-PORT
Default Value : --
Entity Name : --
Section Id : --
Assignment Name : IP_TOOL_VERSION
Value : 13.1
Default Value : --
@@ -163,6 +169,12 @@ Default Value : --
Entity Name : --
Section Id : --
Assignment Name : IP_TOOL_VERSION
Value : 13.1
Default Value : --
Entity Name : --
Section Id : --
Assignment Name : MAX_CORE_JUNCTION_TEMP
Value : 85
Default Value : --
@@ -223,6 +235,12 @@ Default Value : --
Entity Name : --
Section Id : --
Assignment Name : MISC_FILE
Value : ram_video_bb.v
Default Value : --
Entity Name : --
Section Id : --
Assignment Name : NOMINAL_CORE_SUPPLY_VOLTAGE
Value : 1.2V
Default Value : --
@@ -262,38 +280,38 @@ Section Id : --
Module Name : Analysis & Synthesis
Elapsed Time : 00:00:13
Average Processors Used : 1.0
Peak Virtual Memory : 442 MB
Peak Virtual Memory : 441 MB
Total CPU Time (on all processors) : 00:00:13
Module Name : Fitter
Elapsed Time : 00:00:20
Elapsed Time : 00:00:21
Average Processors Used : 1.0
Peak Virtual Memory : 633 MB
Total CPU Time (on all processors) : 00:00:20
Peak Virtual Memory : 639 MB
Total CPU Time (on all processors) : 00:00:21
Module Name : Assembler
Elapsed Time : 00:00:01
Elapsed Time : 00:00:02
Average Processors Used : 1.0
Peak Virtual Memory : 375 MB
Peak Virtual Memory : 385 MB
Total CPU Time (on all processors) : 00:00:02
Module Name : TimeQuest Timing Analyzer
Elapsed Time : 00:00:04
Average Processors Used : 1.0
Peak Virtual Memory : 451 MB
Total CPU Time (on all processors) : 00:00:03
Peak Virtual Memory : 437 MB
Total CPU Time (on all processors) : 00:00:04
Module Name : EDA Netlist Writer
Elapsed Time : 00:00:03
Average Processors Used : 1.0
Peak Virtual Memory : 371 MB
Peak Virtual Memory : 372 MB
Total CPU Time (on all processors) : 00:00:03
Module Name : Total
Elapsed Time : 00:00:41
Elapsed Time : 00:00:43
Average Processors Used : --
Peak Virtual Memory : --
Total CPU Time (on all processors) : 00:00:41
Total CPU Time (on all processors) : 00:00:43
+--------------------------------------------------------------------------------+
output_files/spectrum.jdi
+1 -1
View File
@@ -1,6 +1,6 @@
<sld_project_info>
<project>
<hash md5_digest_80b="848845bd7b18df14562b"/>
<hash md5_digest_80b="8380d13cf466db2d8054"/>
</project>
<file_info>
<file device="EP4CE22F17C6" path="spectrum.sof" usercode="0xFFFFFFFF"/>
output_files/spectrum.map.rpt
+64 -68
View File
@@ -1,5 +1,5 @@
Analysis & Synthesis report for spectrum
Thu Mar 31 14:03:50 2022
Fri Apr 1 18:55:17 2022
Quartus II 32-bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
@@ -70,16 +70,16 @@ applicable agreement for further details.
+---------------------------------------------------------------------------------+
; Analysis & Synthesis Summary ;
+------------------------------------+--------------------------------------------+
; Analysis & Synthesis Status ; Successful - Thu Mar 31 14:03:50 2022 ;
; Analysis & Synthesis Status ; Successful - Fri Apr 1 18:55:17 2022 ;
; Quartus II 32-bit Version ; 13.1.0 Build 162 10/23/2013 SJ Web Edition ;
; Revision Name ; spectrum ;
; Top-level Entity Name ; spectrum ;
; Family ; Cyclone IV E ;
; Total logic elements ; 2,530 ;
; Total combinational functions ; 2,262 ;
; Total logic elements ; 2,537 ;
; Total combinational functions ; 2,269 ;
; Dedicated logic registers ; 592 ;
; Total registers ; 592 ;
; Total pins ; 74 ;
; Total pins ; 75 ;
; Total virtual pins ; 0 ;
; Total memory bits ; 524,288 ;
; Embedded Multiplier 9-bit elements ; 0 ;
@@ -935,32 +935,32 @@ Library :
+---------------------------------------------+---------------------------------+
; Resource ; Usage ;
+---------------------------------------------+---------------------------------+
; Estimated Total logic elements ; 2,530 ;
; Estimated Total logic elements ; 2,537 ;
; ; ;
; Total combinational functions ; 2262 ;
; Total combinational functions ; 2269 ;
; Logic element usage by number of LUT inputs ; ;
; -- 4 input functions ; 1645 ;
; -- 3 input functions ; 364 ;
; -- <=2 input functions ; 253 ;
; -- 4 input functions ; 1640 ;
; -- 3 input functions ; 385 ;
; -- <=2 input functions ; 244 ;
; ; ;
; Logic elements by mode ; ;
; -- normal mode ; 2209 ;
; -- normal mode ; 2216 ;
; -- arithmetic mode ; 53 ;
; ; ;
; Total registers ; 592 ;
; -- Dedicated logic registers ; 592 ;
; -- I/O registers ; 0 ;
; ; ;
; I/O pins ; 74 ;
; I/O pins ; 75 ;
; Total memory bits ; 524288 ;
; Embedded Multiplier 9-bit elements ; 0 ;
; Total PLLs ; 1 ;
; -- PLLs ; 1 ;
; ; ;
; Maximum fan-out node ; ula:ula_|clocks:clocks_|clk_cpu ;
; Maximum fan-out ; 472 ;
; Total fan-out ; 11497 ;
; Average fan-out ; 3.75 ;
; Maximum fan-out ; 436 ;
; Total fan-out ; 11524 ;
; Average fan-out ; 3.74 ;
+---------------------------------------------+---------------------------------+
@@ -968,13 +968,13 @@ Library :
; Analysis & Synthesis Resource Utilization by Entity ;
+--------------------------------------------------------------------------------+
Compilation Hierarchy Node : |spectrum
LC Combinationals : 2262 (87)
LC Combinationals : 2269 (98)
LC Registers : 592 (0)
Memory Bits : 524288
DSP Elements : 0
DSP 9x9 : 0
DSP 18x18 : 0
Pins : 74
Pins : 75
Virtual Pins : 0
Full Hierarchy Name : |spectrum
Library Name : work
@@ -1028,7 +1028,7 @@ Full Hierarchy Name : |spectrum|ram16:ram0|altsyncram:altsyncram_componen
Library Name : work
Compilation Hierarchy Node : |ram32:ram1|
LC Combinationals : 24 (0)
LC Combinationals : 16 (0)
LC Registers : 4 (0)
Memory Bits : 262144
DSP Elements : 0
@@ -1040,7 +1040,7 @@ Full Hierarchy Name : |spectrum|ram32:ram1
Library Name : work
Compilation Hierarchy Node : |altsyncram:altsyncram_component|
LC Combinationals : 24 (0)
LC Combinationals : 16 (0)
LC Registers : 4 (0)
Memory Bits : 262144
DSP Elements : 0
@@ -1052,7 +1052,7 @@ Full Hierarchy Name : |spectrum|ram32:ram1|altsyncram:altsyncram_componen
Library Name : work
Compilation Hierarchy Node : |altsyncram_g9i1:auto_generated|
LC Combinationals : 24 (0)
LC Combinationals : 16 (0)
LC Registers : 4 (4)
Memory Bits : 262144
DSP Elements : 0
@@ -1088,7 +1088,7 @@ Full Hierarchy Name : |spectrum|ram32:ram1|altsyncram:altsyncram_componen
Library Name : work
Compilation Hierarchy Node : |mux_6nb:mux2|
LC Combinationals : 16 (16)
LC Combinationals : 8 (8)
LC Registers : 0 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1136,7 +1136,7 @@ Full Hierarchy Name : |spectrum|rom0:rom|altsyncram:altsyncram_component|
Library Name : work
Compilation Hierarchy Node : |ula:ula_|
LC Combinationals : 418 (4)
LC Combinationals : 420 (4)
LC Registers : 224 (7)
Memory Bits : 0
DSP Elements : 0
@@ -1244,7 +1244,7 @@ Full Hierarchy Name : |spectrum|ula:ula_|video:video_
Library Name : work
Compilation Hierarchy Node : |zx_keyboard:zx_keyboard_|
LC Combinationals : 148 (148)
LC Combinationals : 150 (150)
LC Registers : 43 (43)
Memory Bits : 0
DSP Elements : 0
@@ -1256,7 +1256,7 @@ Full Hierarchy Name : |spectrum|ula:ula_|zx_keyboard:zx_keyboard_
Library Name : work
Compilation Hierarchy Node : |z80_top_direct_n:z80_|
LC Combinationals : 1731 (2)
LC Combinationals : 1733 (2)
LC Registers : 362 (1)
Memory Bits : 0
DSP Elements : 0
@@ -1268,7 +1268,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_
Library Name : work
Compilation Hierarchy Node : |address_latch:address_latch_|
LC Combinationals : 47 (16)
LC Combinationals : 48 (16)
LC Registers : 16 (16)
Memory Bits : 0
DSP Elements : 0
@@ -1280,7 +1280,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|address_latch:addre
Library Name : work
Compilation Hierarchy Node : |inc_dec:b2v_inst_inc_dec|
LC Combinationals : 31 (14)
LC Combinationals : 32 (14)
LC Registers : 0 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1292,7 +1292,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|address_latch:addre
Library Name : work
Compilation Hierarchy Node : |inc_dec_2bit:b2v_dual_adder_0|
LC Combinationals : 3 (3)
LC Combinationals : 4 (4)
LC Registers : 0 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1376,7 +1376,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|address_pins:addres
Library Name : work
Compilation Hierarchy Node : |alu:alu_|
LC Combinationals : 130 (76)
LC Combinationals : 130 (77)
LC Registers : 20 (20)
Memory Bits : 0
DSP Elements : 0
@@ -1400,7 +1400,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|alu:alu_|alu_bit_se
Library Name : work
Compilation Hierarchy Node : |alu_core:b2v_core|
LC Combinationals : 21 (0)
LC Combinationals : 20 (0)
LC Registers : 0 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1448,7 +1448,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|alu:alu_|alu_core:b
Library Name : work
Compilation Hierarchy Node : |alu_slice:b2v_alu_slice_bit_3|
LC Combinationals : 6 (6)
LC Combinationals : 5 (5)
LC Registers : 0 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1544,7 +1544,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|alu_control:alu_con
Library Name : work
Compilation Hierarchy Node : |alu_flags:alu_flags_|
LC Combinationals : 62 (62)
LC Combinationals : 63 (63)
LC Registers : 10 (10)
Memory Bits : 0
DSP Elements : 0
@@ -1604,7 +1604,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|data_switch:sw2_
Library Name : work
Compilation Hierarchy Node : |data_switch_mask:sw1_|
LC Combinationals : 3 (3)
LC Combinationals : 2 (2)
LC Registers : 0 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1628,7 +1628,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|decode_state:decode
Library Name : work
Compilation Hierarchy Node : |execute:execute_|
LC Combinationals : 931 (931)
LC Combinationals : 933 (933)
LC Registers : 0 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1712,7 +1712,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|reg_control:reg_con
Library Name : work
Compilation Hierarchy Node : |reg_file:reg_file_|
LC Combinationals : 283 (274)
LC Combinationals : 282 (273)
LC Registers : 224 (0)
Memory Bits : 0
DSP Elements : 0
@@ -1748,7 +1748,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|reg_file:reg_file_|
Library Name : work
Compilation Hierarchy Node : |reg_latch:b2v_latch_af_hi|
LC Combinationals : 6 (6)
LC Combinationals : 8 (8)
LC Registers : 8 (8)
Memory Bits : 0
DSP Elements : 0
@@ -1832,7 +1832,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|reg_file:reg_file_|
Library Name : work
Compilation Hierarchy Node : |reg_latch:b2v_latch_de2_lo|
LC Combinationals : 1 (1)
LC Combinationals : 0 (0)
LC Registers : 8 (8)
Memory Bits : 0
DSP Elements : 0
@@ -1868,7 +1868,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|reg_file:reg_file_|
Library Name : work
Compilation Hierarchy Node : |reg_latch:b2v_latch_hl2_hi|
LC Combinationals : 2 (2)
LC Combinationals : 0 (0)
LC Registers : 8 (8)
Memory Bits : 0
DSP Elements : 0
@@ -1880,7 +1880,7 @@ Full Hierarchy Name : |spectrum|z80_top_direct_n:z80_|reg_file:reg_file_|
Library Name : work
Compilation Hierarchy Node : |reg_latch:b2v_latch_hl2_lo|
LC Combinationals : 0 (0)
LC Combinationals : 1 (1)
LC Registers : 8 (8)
Memory Bits : 0
DSP Elements : 0
@@ -2290,7 +2290,7 @@ Registers Removed due to This Register : ula:ula_|i2c_loader:i2c_loader_|nak
+----------------------------------------------------------+---------+
; ula:ula_|i2s_intf:i2s_intf_|bitcount[4] ; 4 ;
; ula:ula_|i2s_intf:i2s_intf_|bitcount[0] ; 2 ;
; z80_top_direct_n:z80_|resets:resets_|SYNTHESIZED_WIRE_12 ; 136 ;
; z80_top_direct_n:z80_|resets:resets_|SYNTHESIZED_WIRE_12 ; 138 ;
; ula:ula_|i2s_intf:i2s_intf_|lrdivider[9] ; 2 ;
; ula:ula_|i2s_intf:i2s_intf_|lrdivider[7] ; 2 ;
; ula:ula_|i2s_intf:i2s_intf_|lrdivider[6] ; 2 ;
@@ -2300,7 +2300,6 @@ Registers Removed due to This Register : ula:ula_|i2c_loader:i2c_loader_|nak
; ula:ula_|i2s_intf:i2s_intf_|bdivider[0] ; 6 ;
; ula:ula_|i2s_intf:i2s_intf_|bdivider[4] ; 2 ;
; ula:ula_|i2s_intf:i2s_intf_|bdivider[2] ; 2 ;
; z80_top_direct_n:z80_|sequencer:sequencer_|DFFE_T1_ff ; 59 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[0][1] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[1][1] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[2][1] ; 2 ;
@@ -2309,6 +2308,7 @@ Registers Removed due to This Register : ula:ula_|i2c_loader:i2c_loader_|nak
; ula:ula_|zx_keyboard:zx_keyboard_|keys[5][1] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[6][1] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[7][1] ; 2 ;
; z80_top_direct_n:z80_|sequencer:sequencer_|DFFE_T1_ff ; 59 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[1][2] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[0][2] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[3][2] ; 2 ;
@@ -2331,16 +2331,16 @@ Registers Removed due to This Register : ula:ula_|i2c_loader:i2c_loader_|nak
; ula:ula_|zx_keyboard:zx_keyboard_|keys[2][3] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[5][3] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[4][3] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[7][3] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[6][3] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[7][3] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[1][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[0][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[3][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[2][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[5][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[4][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[7][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[6][4] ; 2 ;
; ula:ula_|zx_keyboard:zx_keyboard_|keys[5][4] ; 2 ;
; z80_top_direct_n:z80_|sequencer:sequencer_|DFFE_M1_ff ; 68 ;
; z80_top_direct_n:z80_|resets:resets_|x1 ; 2 ;
; z80_top_direct_n:z80_|fpga_reset ; 2 ;
@@ -2378,7 +2378,7 @@ Baseline Area : 4 LEs
Area if Restructured : 2 LEs
Saving if Restructured : 2 LEs
Registered : Yes
Example Multiplexer Output : |spectrum|ula:ula_|i2s_intf:i2s_intf_|bdivider[3]
Example Multiplexer Output : |spectrum|ula:ula_|i2s_intf:i2s_intf_|bdivider[1]
Multiplexer Inputs : 6:1
Bus Width : 5 bits
@@ -2402,7 +2402,7 @@ Baseline Area : 42 LEs
Area if Restructured : 14 LEs
Saving if Restructured : 28 LEs
Registered : Yes
Example Multiplexer Output : |spectrum|ula:ula_|i2s_intf:i2s_intf_|shiftreg[8]
Example Multiplexer Output : |spectrum|ula:ula_|i2s_intf:i2s_intf_|shiftreg[4]
Multiplexer Inputs : 5:1
Bus Width : 3 bits
@@ -2434,7 +2434,7 @@ Baseline Area : 10 LEs
Area if Restructured : 4 LEs
Saving if Restructured : 6 LEs
Registered : Yes
Example Multiplexer Output : |spectrum|ula:ula_|i2c_loader:i2c_loader_|shiftreg[5]
Example Multiplexer Output : |spectrum|ula:ula_|i2c_loader:i2c_loader_|shiftreg[6]
Multiplexer Inputs : 10:1
Bus Width : 2 bits
@@ -2458,7 +2458,7 @@ Baseline Area : 72 LEs
Area if Restructured : 52 LEs
Saving if Restructured : 20 LEs
Registered : Yes
Example Multiplexer Output : |spectrum|ula:ula_|i2c_loader:i2c_loader_|shiftreg[3]
Example Multiplexer Output : |spectrum|ula:ula_|i2c_loader:i2c_loader_|shiftreg[4]
Multiplexer Inputs : 3:1
Bus Width : 16 bits
@@ -2466,7 +2466,7 @@ Baseline Area : 32 LEs
Area if Restructured : 32 LEs
Saving if Restructured : 0 LEs
Registered : Yes
Example Multiplexer Output : |spectrum|z80_top_direct_n:z80_|address_pins:address_pins_|DFFE_apin_latch[6]
Example Multiplexer Output : |spectrum|z80_top_direct_n:z80_|address_pins:address_pins_|DFFE_apin_latch[5]
Multiplexer Inputs : 4:1
Bus Width : 3 bits
@@ -2498,7 +2498,7 @@ Baseline Area : 8 LEs
Area if Restructured : 6 LEs
Saving if Restructured : 2 LEs
Registered : No
Example Multiplexer Output : |spectrum|Mux0
Example Multiplexer Output : |spectrum|Mux2
Multiplexer Inputs : 8:1
Bus Width : 6 bits
@@ -2506,7 +2506,7 @@ Baseline Area : 30 LEs
Area if Restructured : 24 LEs
Saving if Restructured : 6 LEs
Registered : No
Example Multiplexer Output : |spectrum|Selector1
Example Multiplexer Output : |spectrum|Selector3
Multiplexer Inputs : 9:1
Bus Width : 2 bits
@@ -2514,7 +2514,7 @@ Baseline Area : 12 LEs
Area if Restructured : 6 LEs
Saving if Restructured : 6 LEs
Registered : No
Example Multiplexer Output : |spectrum|ula:ula_|i2c_loader:i2c_loader_|state.Ack
Example Multiplexer Output : |spectrum|ula:ula_|i2c_loader:i2c_loader_|state.Idle
Multiplexer Inputs : 11:1
Bus Width : 2 bits
@@ -3357,7 +3357,7 @@ Value : 7
Type : Signed Integer
Parameter Name : CLK0_MULTIPLY_BY
Value : 72
Value : 1007
Type : Signed Integer
Parameter Name : CLK9_DIVIDE_BY
@@ -3397,7 +3397,7 @@ Value : 25
Type : Signed Integer
Parameter Name : CLK0_DIVIDE_BY
Value : 143
Value : 2000
Type : Signed Integer
Parameter Name : CLK9_PHASE_SHIFT
@@ -4883,11 +4883,6 @@ Details : Connected to dangling logic. Logic that only feeds a dangling port wi
+--------------------------------------------------------------------------------+
; Port Connectivity Checks: "ula:ula_" ;
+--------------------------------------------------------------------------------+
Port : clk_vram
Type : Output
Severity : Info
Details : Connected to dangling logic. Logic that only feeds a dangling port will be removed.
Port : pressed
Type : Output
Severity : Info
@@ -4953,7 +4948,7 @@ Details : Input port expression (16 bits) is wider than the input port (14 bits
Info: *******************************************************************
Info: Running Quartus II 32-bit Analysis & Synthesis
Info: Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
Info: Processing started: Thu Mar 31 14:03:37 2022
Info: Processing started: Fri Apr 1 18:55:04 2022
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off spectrum -c spectrum
Warning (20028): Parallel compilation is not licensed and has been disabled
Info (12021): Found 1 design units, including 1 entities, in source file spectrum.sv
@@ -5064,8 +5059,10 @@ Info (12021): Found 1 design units, including 1 entities, in source file rom_scr
Info (12023): Found entity 1: rom_scr
Info (12021): Found 1 design units, including 1 entities, in source file pll_video.v
Info (12023): Found entity 1: pll_video
Info (12021): Found 1 design units, including 1 entities, in source file ram_video.v
Info (12023): Found entity 1: ram_video
Info (12127): Elaborating entity "spectrum" for the top level hierarchy
Warning (10034): Output port "LED[7..3]" at spectrum.sv(1) has no driver
Warning (10034): Output port "LED[7..4]" at spectrum.sv(1) has no driver
Warning (10034): Output port "LED[1]" at spectrum.sv(1) has no driver
Warning (10034): Output port "GPIO_1[33..32]" at spectrum.sv(20) has no driver
Info (12128): Elaborating entity "rom0" for hierarchy "rom0:rom"
@@ -5169,9 +5166,9 @@ Info (12128): Elaborating entity "altpll" for hierarchy "ula:ula_|pll:pll_|altpl
Info (12130): Elaborated megafunction instantiation "ula:ula_|pll:pll_|altpll:altpll_component"
Info (12133): Instantiated megafunction "ula:ula_|pll:pll_|altpll:altpll_component" with the following parameter:
Info (12134): Parameter "bandwidth_type" = "AUTO"
Info (12134): Parameter "clk0_divide_by" = "143"
Info (12134): Parameter "clk0_divide_by" = "2000"
Info (12134): Parameter "clk0_duty_cycle" = "50"
Info (12134): Parameter "clk0_multiply_by" = "72"
Info (12134): Parameter "clk0_multiply_by" = "1007"
Info (12134): Parameter "clk0_phase_shift" = "0"
Info (12134): Parameter "clk1_divide_by" = "25"
Info (12134): Parameter "clk1_duty_cycle" = "50"
@@ -5377,7 +5374,6 @@ Info (13000): Registers with preset signals will power-up high
Info (13003): DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back
Warning (13024): Output pins are stuck at VCC or GND
Warning (13410): Pin "LED[1]" is stuck at GND
Warning (13410): Pin "LED[3]" is stuck at GND
Warning (13410): Pin "LED[4]" is stuck at GND
Warning (13410): Pin "LED[5]" is stuck at GND
Warning (13410): Pin "LED[6]" is stuck at GND
@@ -5393,16 +5389,16 @@ Info (16010): Generating hard_block partition "hard_block:auto_generated_inst"
Warning (21074): Design contains 2 input pin(s) that do not drive logic
Warning (15610): No output dependent on input pin "SW[0]"
Warning (15610): No output dependent on input pin "SW[3]"
Info (21057): Implemented 2739 device resources after synthesis - the final resource count might be different
Info (21058): Implemented 10 input pins
Info (21057): Implemented 2747 device resources after synthesis - the final resource count might be different
Info (21058): Implemented 11 input pins
Info (21059): Implemented 62 output pins
Info (21060): Implemented 2 bidirectional pins
Info (21061): Implemented 2600 logic cells
Info (21061): Implemented 2607 logic cells
Info (21064): Implemented 64 RAM segments
Info (21065): Implemented 1 PLLs
Info: Quartus II 32-bit Analysis & Synthesis was successful. 0 errors, 111 warnings
Info: Peak virtual memory: 442 megabytes
Info: Processing ended: Thu Mar 31 14:03:50 2022
Info: Quartus II 32-bit Analysis & Synthesis was successful. 0 errors, 110 warnings
Info: Peak virtual memory: 441 megabytes
Info: Processing ended: Fri Apr 1 18:55:17 2022
Info: Elapsed time: 00:00:13
Info: Total CPU time (on all processors): 00:00:13
output_files/spectrum.map.summary
+4 -4
View File
@@ -1,13 +1,13 @@
Analysis & Synthesis Status : Successful - Thu Mar 31 14:03:50 2022
Analysis & Synthesis Status : Successful - Fri Apr 1 18:55:17 2022
Quartus II 32-bit Version : 13.1.0 Build 162 10/23/2013 SJ Web Edition
Revision Name : spectrum
Top-level Entity Name : spectrum
Family : Cyclone IV E
Total logic elements : 2,530
Total combinational functions : 2,262
Total logic elements : 2,537
Total combinational functions : 2,269
Dedicated logic registers : 592
Total registers : 592
Total pins : 74
Total pins : 75
Total virtual pins : 0
Total memory bits : 524,288
Embedded Multiplier 9-bit elements : 0
output_files/spectrum.pin
+1 -1
View File
@@ -89,7 +89,7 @@ GND : B2 : gnd : :
RESERVED_INPUT_WITH_WEAK_PULLUP : B3 : : : : 8 :
RESERVED_INPUT_WITH_WEAK_PULLUP : B4 : : : : 8 :
RESERVED_INPUT_WITH_WEAK_PULLUP : B5 : : : : 8 :
RESERVED_INPUT_WITH_WEAK_PULLUP : B6 : : : : 8 :
raw_loader_in : B6 : input : 3.3-V LVTTL : : 8 : Y
PS2_DAT : B7 : input : 3.3-V LVTTL : : 8 : Y
GND+ : B8 : : : : 8 :
SW[2] : B9 : input : 3.3-V LVTTL : : 7 : Y
output_files/spectrum.sof
BIN
View File
Binary file not shown.
output_files/spectrum.sta.rpt
+21726 -21108
View File
File diff suppressed because it is too large Load Diff
output_files/spectrum.sta.summary
+50 -50
View File
@@ -3,31 +3,31 @@ TimeQuest Timing Analyzer Summary
------------------------------------------------------------
Type : Slow 1200mV 85C Model Setup 'CLOCK_50'
Slack : -18.442
TNS : -343.502
Type : Slow 1200mV 85C Model Setup 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : -4.732
TNS : -41.482
Slack : -18.123
TNS : -549.338
Type : Slow 1200mV 85C Model Setup 'ula_|pll_|altpll_component|auto_generated|pll1|clk[0]'
Slack : -3.760
TNS : -51.393
Slack : -7.533
TNS : -284.813
Type : Slow 1200mV 85C Model Setup 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : -4.740
TNS : -42.810
Type : Slow 1200mV 85C Model Setup 'ula_|pll_|altpll_component|auto_generated|pll1|clk[1]'
Slack : -2.914
TNS : -2.914
Type : Slow 1200mV 85C Model Hold 'CLOCK_50'
Slack : -0.980
TNS : -15.725
Slack : 0.210
TNS : 0.000
Type : Slow 1200mV 85C Model Hold 'ula_|pll_|altpll_component|auto_generated|pll1|clk[1]'
Slack : 0.342
TNS : 0.000
Type : Slow 1200mV 85C Model Hold 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : 0.342
Slack : 0.344
TNS : 0.000
Type : Slow 1200mV 85C Model Hold 'ula_|pll_|altpll_component|auto_generated|pll1|clk[0]'
@@ -35,19 +35,19 @@ Slack : 0.357
TNS : 0.000
Type : Slow 1200mV 85C Model Recovery 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : -6.277
TNS : -463.435
Slack : -6.223
TNS : -459.348
Type : Slow 1200mV 85C Model Removal 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : 3.683
Slack : 3.698
TNS : 0.000
Type : Slow 1200mV 85C Model Minimum Pulse Width 'CLOCK_50'
Slack : 9.489
Slack : 9.488
TNS : 0.000
Type : Slow 1200mV 85C Model Minimum Pulse Width 'ula_|pll_|altpll_component|auto_generated|pll1|clk[0]'
Slack : 19.600
Slack : 19.602
TNS : 0.000
Type : Slow 1200mV 85C Model Minimum Pulse Width 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
@@ -59,31 +59,31 @@ Slack : 35.503
TNS : 0.000
Type : Slow 1200mV 0C Model Setup 'CLOCK_50'
Slack : -17.588
TNS : -332.785
Type : Slow 1200mV 0C Model Setup 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : -4.423
TNS : -38.803
Slack : -17.311
TNS : -526.609
Type : Slow 1200mV 0C Model Setup 'ula_|pll_|altpll_component|auto_generated|pll1|clk[0]'
Slack : -3.309
TNS : -45.165
Slack : -6.686
TNS : -253.661
Type : Slow 1200mV 0C Model Setup 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : -4.428
TNS : -40.009
Type : Slow 1200mV 0C Model Setup 'ula_|pll_|altpll_component|auto_generated|pll1|clk[1]'
Slack : -2.785
TNS : -2.785
Type : Slow 1200mV 0C Model Hold 'CLOCK_50'
Slack : -0.780
TNS : -12.413
Type : Slow 1200mV 0C Model Hold 'ula_|pll_|altpll_component|auto_generated|pll1|clk[1]'
Slack : 0.298
TNS : 0.000
Type : Slow 1200mV 0C Model Hold 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : 0.298
Slack : 0.300
TNS : 0.000
Type : Slow 1200mV 0C Model Hold 'CLOCK_50'
Slack : 0.304
TNS : 0.000
Type : Slow 1200mV 0C Model Hold 'ula_|pll_|altpll_component|auto_generated|pll1|clk[0]'
@@ -91,23 +91,23 @@ Slack : 0.311
TNS : 0.000
Type : Slow 1200mV 0C Model Recovery 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : -5.784
TNS : -426.554
Slack : -5.744
TNS : -423.582
Type : Slow 1200mV 0C Model Removal 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : 3.369
Slack : 3.374
TNS : 0.000
Type : Slow 1200mV 0C Model Minimum Pulse Width 'CLOCK_50'
Slack : 9.488
Slack : 9.489
TNS : 0.000
Type : Slow 1200mV 0C Model Minimum Pulse Width 'ula_|pll_|altpll_component|auto_generated|pll1|clk[0]'
Slack : 19.594
Slack : 19.600
TNS : 0.000
Type : Slow 1200mV 0C Model Minimum Pulse Width 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : 20.588
Slack : 20.591
TNS : 0.000
Type : Slow 1200mV 0C Model Minimum Pulse Width 'ula_|pll_|altpll_component|auto_generated|pll1|clk[1]'
@@ -115,31 +115,31 @@ Slack : 35.491
TNS : 0.000
Type : Fast 1200mV 0C Model Setup 'CLOCK_50'
Slack : -15.171
TNS : -291.784
Slack : -14.971
TNS : -442.545
Type : Fast 1200mV 0C Model Setup 'ula_|pll_|altpll_component|auto_generated|pll1|clk[0]'
Slack : -4.979
TNS : -171.124
Type : Fast 1200mV 0C Model Setup 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : -3.800
TNS : -34.909
Slack : -3.775
TNS : -35.541
Type : Fast 1200mV 0C Model Setup 'ula_|pll_|altpll_component|auto_generated|pll1|clk[1]'
Slack : -2.784
TNS : -2.784
Type : Fast 1200mV 0C Model Setup 'ula_|pll_|altpll_component|auto_generated|pll1|clk[0]'
Slack : -2.194
TNS : -30.204
Type : Fast 1200mV 0C Model Hold 'CLOCK_50'
Slack : -0.698
TNS : -11.143
Slack : -0.053
TNS : -0.089
Type : Fast 1200mV 0C Model Hold 'ula_|pll_|altpll_component|auto_generated|pll1|clk[1]'
Slack : 0.177
TNS : 0.000
Type : Fast 1200mV 0C Model Hold 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : 0.179
Slack : 0.178
TNS : 0.000
Type : Fast 1200mV 0C Model Hold 'ula_|pll_|altpll_component|auto_generated|pll1|clk[0]'
@@ -147,11 +147,11 @@ Slack : 0.186
TNS : 0.000
Type : Fast 1200mV 0C Model Recovery 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : -4.738
TNS : -361.836
Slack : -4.693
TNS : -358.284
Type : Fast 1200mV 0C Model Removal 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'
Slack : 2.515
Slack : 2.518
TNS : 0.000
Type : Fast 1200mV 0C Model Minimum Pulse Width 'CLOCK_50'
@@ -159,7 +159,7 @@ Slack : 9.208
TNS : 0.000
Type : Fast 1200mV 0C Model Minimum Pulse Width 'ula_|pll_|altpll_component|auto_generated|pll1|clk[0]'
Slack : 19.640
Slack : 19.609
TNS : 0.000
Type : Fast 1200mV 0C Model Minimum Pulse Width 'ula_|pll_|altpll_component|auto_generated|pll1|clk[2]'