ROM0 now has the spectrum rom

2022-03-30 13:18:06 +03:00
parent c59b02b186
commit 9d6eb7a9fa
94 changed files with 27700 additions and 9902 deletions
@@ -0,0 +1,53 @@
+--lpm_mux CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone IV E" LPM_SIZE=2 LPM_WIDTH=8 LPM_WIDTHS=1 data result sel
+--VERSION_BEGIN 13.1 cbx_lpm_mux 2013:10:17:09:48:19:SJ cbx_mgl 2013:10:17:09:48:49:SJ  VERSION_END
+
+
+-- Copyright (C) 1991-2013 Altera Corporation
+--  Your use of Altera Corporation's design tools, logic functions 
+--  and other software and tools, and its AMPP partner logic 
+--  functions, and any output files from any of the foregoing 
+--  (including device programming or simulation files), and any 
+--  associated documentation or information are expressly subject 
+--  to the terms and conditions of the Altera Program License 
+--  Subscription Agreement, Altera MegaCore Function License 
+--  Agreement, or other applicable license agreement, including, 
+--  without limitation, that your use is for the sole purpose of 
+--  programming logic devices manufactured by Altera and sold by 
+--  Altera or its authorized distributors.  Please refer to the 
+--  applicable agreement for further details.
+
+
+
+--synthesis_resources = lut 8 
+SUBDESIGN mux_3nb
+( 
+	data[15..0]	:	input;
+	result[7..0]	:	output;
+	sel[0..0]	:	input;
+) 
+VARIABLE 
+	result_node[7..0]	: WIRE;
+	sel_node[0..0]	: WIRE;
+	w_data109w[1..0]	: WIRE;
+	w_data121w[1..0]	: WIRE;
+	w_data133w[1..0]	: WIRE;
+	w_data145w[1..0]	: WIRE;
+	w_data157w[1..0]	: WIRE;
+	w_data169w[1..0]	: WIRE;
+	w_data83w[1..0]	: WIRE;
+	w_data97w[1..0]	: WIRE;
+
+BEGIN 
+	result[] = result_node[];
+	result_node[] = ( ((sel_node[] & w_data169w[1..1]) # ((! sel_node[]) & w_data169w[0..0])), ((sel_node[] & w_data157w[1..1]) # ((! sel_node[]) & w_data157w[0..0])), ((sel_node[] & w_data145w[1..1]) # ((! sel_node[]) & w_data145w[0..0])), ((sel_node[] & w_data133w[1..1]) # ((! sel_node[]) & w_data133w[0..0])), ((sel_node[] & w_data121w[1..1]) # ((! sel_node[]) & w_data121w[0..0])), ((sel_node[] & w_data109w[1..1]) # ((! sel_node[]) & w_data109w[0..0])), ((sel_node[] & w_data97w[1..1]) # ((! sel_node[]) & w_data97w[0..0])), ((sel_node[] & w_data83w[1..1]) # ((! sel_node[]) & w_data83w[0..0])));
+	sel_node[] = ( sel[0..0]);
+	w_data109w[] = ( data[10..10], data[2..2]);
+	w_data121w[] = ( data[11..11], data[3..3]);
+	w_data133w[] = ( data[12..12], data[4..4]);
+	w_data145w[] = ( data[13..13], data[5..5]);
+	w_data157w[] = ( data[14..14], data[6..6]);
+	w_data169w[] = ( data[15..15], data[7..7]);
+	w_data83w[] = ( data[8..8], data[0..0]);
+	w_data97w[] = ( data[9..9], data[1..1]);
+END;
+--VALID FILE