Added kempston, autofire and enable autofire, enable turbo push buttons for GPIO1[32] and GPIO1[33]

2022-04-06 14:01:01 +03:00
parent 114238753f
commit 9966f9a3a6
387 changed files with 564644 additions and 442870 deletions
@@ -0,0 +1,55 @@
+--sld_ela_trigger DATA_BITS=12 INVERSION_MASK=00000000 INVERSION_MASK_LENGTH=1 LEVEL_NAMES="sld_reserved_spectrum_auto_signaltap_0_1_eb98," POWER_UP_TRIGGER=0 TRIGGER_LEVEL=1 acq_clk data_in reset_all setup_bit_in setup_bit_out setup_ena tck trigger_level_match_out
+--VERSION_BEGIN 13.1 cbx_mgl 2013:10:17:09:48:49:SJ cbx_sld_ela_trigger 2013:10:17:09:48:19:SJ  VERSION_END
+
+
+-- Copyright (C) 1991-2013 Altera Corporation
+--  Your use of Altera Corporation's design tools, logic functions 
+--  and other software and tools, and its AMPP partner logic 
+--  functions, and any output files from any of the foregoing 
+--  (including device programming or simulation files), and any 
+--  associated documentation or information are expressly subject 
+--  to the terms and conditions of the Altera Program License 
+--  Subscription Agreement, Altera MegaCore Function License 
+--  Agreement, or other applicable license agreement, including, 
+--  without limitation, that your use is for the sole purpose of 
+--  programming logic devices manufactured by Altera and sold by 
+--  Altera or its authorized distributors.  Please refer to the 
+--  applicable agreement for further details.
+
+
+FUNCTION sld_reserved_spectrum_auto_signaltap_0_1_eb98 (acq_clk, data_in[11..0], reset_all, setup_bit_in, setup_ena, tck)
+WITH ( ASYNC_ENABLED, DATA_BITS, SYNC_ENABLED, TRIGGER_LEVEL)
+RETURNS ( setup_bit_out, trigger);
+
+--synthesis_resources = sld_reserved_spectrum_auto_signaltap_0_1_eb98 1 
+SUBDESIGN sld_ela_trigger_cso
+( 
+	acq_clk	:	input;
+	data_in[11..0]	:	input;
+	reset_all	:	input;
+	setup_bit_in	:	input;
+	setup_bit_out	:	output;
+	setup_ena	:	input;
+	tck	:	input;
+	trigger_level_match_out[0..0]	:	output;
+) 
+VARIABLE 
+	mgl_prim1 : sld_reserved_spectrum_auto_signaltap_0_1_eb98
+		WITH (
+			ASYNC_ENABLED = 0,
+			DATA_BITS = 12,
+			SYNC_ENABLED = 0,
+			TRIGGER_LEVEL = 1
+		);
+
+BEGIN 
+	mgl_prim1.acq_clk = acq_clk;
+	mgl_prim1.data_in[] = data_in[];
+	mgl_prim1.reset_all = reset_all;
+	mgl_prim1.setup_bit_in = setup_bit_in;
+	mgl_prim1.setup_ena = setup_ena;
+	mgl_prim1.tck = tck;
+	setup_bit_out = mgl_prim1.setup_bit_out;
+	trigger_level_match_out[] = ( mgl_prim1.trigger);
+END;
+--VALID FILE