30 lines
829 B
Verilog
30 lines
829 B
Verilog
module debouncer(input i_Clk, input i_Switch, output o_Switch);
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parameter c_DEBOUNCE_LIMIT = 1100000; // 30 ms at 50 MHz
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reg [20:0] r_Count = 0;
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reg r_State = 1'b0;
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always @(posedge i_Clk)
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begin
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// Switch input is different than internal switch value, so an input is
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// changing. Increase the counter until it is stable for enough time.
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if (i_Switch !== r_State && r_Count < c_DEBOUNCE_LIMIT)
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r_Count <= r_Count + 1;
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// End of counter reached, switch is stable, register it, reset counter
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else if (r_Count == c_DEBOUNCE_LIMIT)
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begin
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r_State <= i_Switch;
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r_Count <= 0;
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end
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// Switches are the same state, reset the counter
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else
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r_Count <= 0;
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end
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// Assign internal register to output (debounced!)
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assign o_Switch = r_State;
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endmodule |