Flow report for spectrum Wed Mar 30 12:38:42 2022 Quartus II 32-bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition --------------------- ; Table of Contents ; --------------------- 1. Legal Notice 2. Flow Summary 3. Flow Settings 4. Flow Non-Default Global Settings 5. Flow Elapsed Time 6. Flow OS Summary 7. Flow Log 8. Flow Messages 9. Flow Suppressed Messages ---------------- ; Legal Notice ; ---------------- Copyright (C) 1991-2013 Altera Corporation Your use of Altera Corporation's design tools, logic functions and other software and tools, and its AMPP partner logic functions, and any output files from any of the foregoing (including device programming or simulation files), and any associated documentation or information are expressly subject to the terms and conditions of the Altera Program License Subscription Agreement, Altera MegaCore Function License Agreement, or other applicable license agreement, including, without limitation, that your use is for the sole purpose of programming logic devices manufactured by Altera and sold by Altera or its authorized distributors. Please refer to the applicable agreement for further details. +---------------------------------------------------------------------------------+ ; Flow Summary ; +------------------------------------+--------------------------------------------+ ; Flow Status ; Successful - Wed Mar 30 12:38:42 2022 ; ; Quartus II 32-bit Version ; 13.1.0 Build 162 10/23/2013 SJ Web Edition ; ; Revision Name ; spectrum ; ; Top-level Entity Name ; spectrum ; ; Family ; Cyclone IV E ; ; Device ; EP4CE22F17C6 ; ; Timing Models ; Final ; ; Total logic elements ; 33 / 22,320 ( < 1 % ) ; ; Total combinational functions ; 33 / 22,320 ( < 1 % ) ; ; Dedicated logic registers ; 24 / 22,320 ( < 1 % ) ; ; Total registers ; 24 ; ; Total pins ; 9 / 154 ( 6 % ) ; ; Total virtual pins ; 0 ; ; Total memory bits ; 64 / 608,256 ( < 1 % ) ; ; Embedded Multiplier 9-bit elements ; 0 / 132 ( 0 % ) ; ; Total PLLs ; 0 / 4 ( 0 % ) ; +------------------------------------+--------------------------------------------+ +-----------------------------------------+ ; Flow Settings ; +-------------------+---------------------+ ; Option ; Setting ; +-------------------+---------------------+ ; Start date & time ; 03/30/2022 12:38:27 ; ; Main task ; Compilation ; ; Revision Name ; spectrum ; +-------------------+---------------------+ +--------------------------------------------------------------------------------+ ; Flow Non-Default Global Settings ; +--------------------------------------------------------------------------------+ Assignment Name : COMPILER_SIGNATURE_ID Value : 0.164863310720961 Default Value : -- Entity Name : -- Section Id : -- Assignment Name : EDA_OUTPUT_DATA_FORMAT Value : Verilog Hdl Default Value : -- Entity Name : -- Section Id : eda_simulation Assignment Name : EDA_SIMULATION_TOOL Value : ModelSim-Altera (Verilog) Default Value : Entity Name : -- Section Id : -- Assignment Name : IP_TOOL_NAME Value : ROM: 1-PORT Default Value : -- Entity Name : -- Section Id : -- Assignment Name : IP_TOOL_VERSION Value : 13.1 Default Value : -- Entity Name : -- Section Id : -- Assignment Name : MAX_CORE_JUNCTION_TEMP Value : 85 Default Value : -- Entity Name : -- Section Id : -- Assignment Name : MIN_CORE_JUNCTION_TEMP Value : 0 Default Value : -- Entity Name : -- Section Id : -- Assignment Name : MISC_FILE Value : rom0_bb.v Default Value : -- Entity Name : -- Section Id : -- Assignment Name : NOMINAL_CORE_SUPPLY_VOLTAGE Value : 1.2V Default Value : -- Entity Name : -- Section Id : -- Assignment Name : PARTITION_COLOR Value : 16764057 Default Value : -- Entity Name : -- Section Id : Top Assignment Name : PARTITION_FITTER_PRESERVATION_LEVEL Value : PLACEMENT_AND_ROUTING Default Value : -- Entity Name : -- Section Id : Top Assignment Name : PARTITION_NETLIST_TYPE Value : SOURCE Default Value : -- Entity Name : -- Section Id : Top Assignment Name : PROJECT_OUTPUT_DIRECTORY Value : output_files Default Value : -- Entity Name : -- Section Id : -- +--------------------------------------------------------------------------------+ +--------------------------------------------------------------------------------+ ; Flow Elapsed Time ; +--------------------------------------------------------------------------------+ Module Name : Analysis & Synthesis Elapsed Time : 00:00:02 Average Processors Used : 1.0 Peak Virtual Memory : 373 MB Total CPU Time (on all processors) : 00:00:01 Module Name : Fitter Elapsed Time : 00:00:05 Average Processors Used : 1.0 Peak Virtual Memory : 600 MB Total CPU Time (on all processors) : 00:00:06 Module Name : Assembler Elapsed Time : 00:00:01 Average Processors Used : 1.0 Peak Virtual Memory : 393 MB Total CPU Time (on all processors) : 00:00:01 Module Name : TimeQuest Timing Analyzer Elapsed Time : 00:00:02 Average Processors Used : 1.0 Peak Virtual Memory : 415 MB Total CPU Time (on all processors) : 00:00:02 Module Name : EDA Netlist Writer Elapsed Time : 00:00:01 Average Processors Used : 1.0 Peak Virtual Memory : 332 MB Total CPU Time (on all processors) : 00:00:01 Module Name : Total Elapsed Time : 00:00:11 Average Processors Used : -- Peak Virtual Memory : -- Total CPU Time (on all processors) : 00:00:11 +--------------------------------------------------------------------------------+ +--------------------------------------------------------------------------------+ ; Flow OS Summary ; +--------------------------------------------------------------------------------+ Module Name : Analysis & Synthesis Machine Hostname : alpha OS Name : Ubuntu 21.10 OS Version : 21 Processor type : x86_64 Module Name : Fitter Machine Hostname : alpha OS Name : Ubuntu 21.10 OS Version : 21 Processor type : x86_64 Module Name : Assembler Machine Hostname : alpha OS Name : Ubuntu 21.10 OS Version : 21 Processor type : x86_64 Module Name : TimeQuest Timing Analyzer Machine Hostname : alpha OS Name : Ubuntu 21.10 OS Version : 21 Processor type : x86_64 Module Name : EDA Netlist Writer Machine Hostname : alpha OS Name : Ubuntu 21.10 OS Version : 21 Processor type : x86_64 +--------------------------------------------------------------------------------+ ------------ ; Flow Log ; ------------ quartus_map --read_settings_files=on --write_settings_files=off spectrum -c spectrum quartus_fit --read_settings_files=off --write_settings_files=off spectrum -c spectrum quartus_asm --read_settings_files=off --write_settings_files=off spectrum -c spectrum quartus_sta spectrum -c spectrum quartus_eda --read_settings_files=off --write_settings_files=off spectrum -c spectrum