#**************************************************************
# Time Information
#**************************************************************

set_time_format -unit ns -decimal_places 3

#**************************************************************
# Create Clock
#**************************************************************

create_clock -name "CLOCK_50" -period 50MHz [get_ports {CLOCK_50}]
create_clock -name KEY1 -period 10.000 [get_ports {KEY1}]
create_clock -name beep -period 10.000 [get_registers {ula:ula_|beep}]

derive_pll_clocks -create_base_clocks

#**************************************************************
# Create Generated Clock
#**************************************************************

create_generated_clock -name clk_cpu -source [get_pins {ula_|clocks_|clk_cpu|clk}] -divide_by 4 [get_pins {ula_|clocks_|clk_cpu|regout}]

#**************************************************************
# Set Clock Latency
#**************************************************************


#**************************************************************
# Set Clock Uncertainty
#**************************************************************

derive_clock_uncertainty

#**************************************************************
# Set Input Delay
#**************************************************************

set_input_delay -clock CLOCK_50 -max 2 [all_inputs]
set_input_delay -clock CLOCK_50 -min 1 [all_inputs]

set_input_delay -add_delay -max -clock [get_clocks {CLOCK_50}]  2.000 [get_ports {CLOCK_50}]
set_input_delay -add_delay -min -clock [get_clocks {CLOCK_50}]  1.000 [get_ports {CLOCK_50}]

#**************************************************************
# Set Output Delay
#**************************************************************

set_output_delay -clock CLOCK_50 10 [all_outputs]

#**************************************************************
# Set Clock Groups
#**************************************************************

set_clock_groups -asynchronous \
 -group [get_clocks {CLOCK_50}] \
 -group [get_clocks {clk_cpu}] \
 -group [get_clocks {KEY1}] \
 -group [get_clocks {beep}] \
 -group ula_|pll_|altpll_component|pll|clk[0] \
 -group ula_|pll_|altpll_component|pll|clk[1] \
 -group ula_|pll_|altpll_component|pll|clk[2]

#**************************************************************
# Set False Path
#**************************************************************


#**************************************************************
# Set Multicycle Path
#**************************************************************


#**************************************************************
# Set Maximum Delay
#**************************************************************


#**************************************************************
# Set Minimum Delay
#**************************************************************


#**************************************************************
# Set Input Transition
#**************************************************************