Fixed video, kbd and buzzer
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//============================================================================
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// Test Sinclair ZX Spectrum ULA
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//
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// Copyright (C) 2014-2016 Goran Devic
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//
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// This program is free software; you can redistribute it and/or modify it
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// under the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 of the License, or (at your option)
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// any later version.
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//
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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// more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with this program; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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//============================================================================
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module test_ula
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(
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input wire CLOCK_50, // Input clock 50 MHz
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input wire CLOCK_27, // Input clock 27 MHz
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input wire KEY0, // Button 0 is reset
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output wire [3:0] VGA_R,
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output wire [3:0] VGA_G,
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output wire [3:0] VGA_B,
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output reg VGA_HS,
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output reg VGA_VS,
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output wire [21:0] FL_ADDR,
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input wire [7:0] FL_DQ,
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output wire FL_CE_N,
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output wire FL_OE_N,
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output wire FL_RST_N,
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output wire FL_WE_N,
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input wire PS2_CLK,
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input wire PS2_DAT,
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output wire UART_TXD,
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output wire [6:0] GPIO_0, // Scope test points
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input wire SW0,
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input wire SW1,
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input wire SW2
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);
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`default_nettype none
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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// Instantiate PLL and clocks block
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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wire clk_pix; // VGA pixel clock (25.175 MHz)
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wire clk_ula; // ULA master clock (14 MHz)
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pll pll_( .inclk0(CLOCK_27), .c0(clk_pix), .c1(clk_ula) );
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wire clk_cpu; // Clocks generates CPU clocks of 3.5 MHz
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clocks clocks_( .* );
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// Various scope test points, connect as needed:
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//assign GPIO_0[0] = CLOCK_27;
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//assign GPIO_0[1] = clk_pix;
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//assign GPIO_0[2] = clk_ula;
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//assign GPIO_0[3] = clk_cpu;
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assign GPIO_0[4] = VGA_VS;
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assign GPIO_0[5] = VGA_HS;
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assign GPIO_0[6] = VGA_B[0];
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assign GPIO_0[0] = PS2_CLK;
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assign GPIO_0[1] = PS2_DAT;
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assign GPIO_0[2] = UART_TXD;
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assign GPIO_0[3] = vs_nintr;
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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// Instantiate RAM that contains a sample screen image
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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reg [12:0] vram_address;
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reg [7:0] vram_data;
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ram8 ram8_( .address(vram_address), .clock(clk_pix), .data(0), .wren(0), .q(vram_data));
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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// State register containing the border color index
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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reg [7:0] state;
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// Testing: assign the border color index based on the board switches
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wire [2:0] border; // Border color index value
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assign border = { SW2, SW1, SW0 };
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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// Instantiate ULA's video subsystem
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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wire vs_nintr; // Vertical retrace interrupt
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video video_( .*, .vram_address(vram_address), .vram_data(vram_data) );
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// Use flash interface instead of the internal RAM
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assign FL_CE_N = 0;
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assign FL_OE_N = 0;
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assign FL_RST_N = KEY0;
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assign FL_WE_N = 1;
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assign FL_ADDR[21:13] = 'b10;
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//video video_( .*, .vram_address(FL_ADDR[12:0]), .vram_data(FL_DQ) );
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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// Instantiate keyboard support
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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wire [7:0] scan_code;
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wire scan_code_ready;
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wire scan_code_error;
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ps2_keyboard ps2_keyboard_( .*, .clk(CLOCK_50), .reset(KEY0) );
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reg [15:0] A = 16'hFEFE;
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wire [4:0] key_row;
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zx_keyboard zx_keyboard_( .*, .clk(CLOCK_50), .reset(KEY0) );
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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// Add UART so we can echo keyboard through the serial port out
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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wire busy_tx;
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uart_core uart_core_( .*, .reset(!KEY0), .clk(CLOCK_50), .uart_tx(UART_TXD), .data_in(scan_code), .data_in_wr(scan_code_ready) );
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endmodule
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