Fixed video, kbd and buzzer

This commit is contained in:
2022-03-31 14:13:34 +03:00
parent 107dded913
commit 61ed88ce64
493 changed files with 633379 additions and 79570 deletions
+76
View File
@@ -0,0 +1,76 @@
These files are part of the Fuse emulator Z80 test vectors:
http://fuse-emulator.sourceforge.net/
File formats
============
tests.in
--------
Each test has the format:
<arbitrary test description>
AF BC DE HL AF' BC' DE' HL' IX IY SP PC
I R IFF1 IFF2 IM <halted> <tstates>
<halted> specifies whether the Z80 is halted.
<tstates> specifies the number of tstates to run the test for, in
decimal; the number actually executed may be higher, as the final
instruction is allowed to complete.
Then followed by lines specifying the initial memory setup. Each has
the format:
<start address> <byte1> <byte2> ... -1
eg
1234 56 78 9a -1
says to put 0x56 at 0x1234, 0x78 at 0x1235 and 0x9a at 0x1236.
Finally, -1 to end the test. Blank lines may follow before the next test.
tests.expected
--------------
Each test output starts with the test description, followed by a list
of 'events': each has the format
<time> <type> <address> <data>
<time> is simply the time at which the event occurs.
<type> is one of MR (memory read), MW (memory write), MC (memory
contend), PR (port read), PW (port write) or PC (port contend).
<address> is the address (or IO port) affected.
<data> is the byte written or read. Missing for contentions.
After that, lines specifying AF, BC etc as for .in files. <tstates>
now specifies the final time.
After that, lines specifying which bits of memory have changed since
the initial setup. Same format as for .in files.
Why some specific tests are here
================================
37_{1,2,3}: check the behaviour of SCF with respect to bits 3 and 5
(bug fixed on 20040225).
cb{4,5,6,7}{7,f}_1: designed to check that bits 3 and 5 are copied to
F only for BIT 3,<arg> and BIT 5,<arg> respectively
(bug fixed on 20040225).
However, later research has revealed the bits 3
and 5 are copied on all BIT instructions, so these
tests are now essentially redundant.
d{3,b}_{1,2,3}: check for correct port contention on IO in the four
relevant states (port high byte in 0x40 to 0x7f or not,
port low bit set or reset).
dd00.in, ddfd00.in: test timings of "extended NOP" opcodes DD 00 and
DD FD 00; the extra 00 at the end is to check the
next opcode executes at the right time (bug fixed
on 20060722).
+263
View File
@@ -0,0 +1,263 @@
00 NOP
0 MC 0000
4 MR 0000 00
0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0001
00 01 0 0 0 0 4
ed67 RRD
0 MC 0000
4 MR 0000 ed
4 MC 0001
8 MR 0001 67
8 MC b9de
11 MR b9de 93
11 MC b9de
12 MC b9de
13 MC b9de
14 MC b9de
15 MC b9de
18 MW b9de 69
3324 b16a a4db b9de 0000 0000 0000 0000 0000 0000 0000 0002
00 02 0 0 0 0 18
b9de 69 -1
ed6f RLD
0 MC 0000
4 MR 0000 ed
4 MC 0001
8 MR 0001 6f
8 MC 403c
11 MR 403c c4
11 MC 403c
12 MC 403c
13 MC 403c
14 MC 403c
15 MC 403c
18 MW 403c 45
6c2d 7a7a ecf0 403c 0000 0000 0000 0000 0000 0000 0000 0002
00 02 0 0 0 0 18
403c 45 -1
81 ADD A,C
0 MC 0000
4 MR 0000 81
3031 0f3b 200d dca6 0000 0000 0000 0000 0000 0000 0000 0001
00 01 0 0 0 0 4
cb41 BIT 0,C
0 MC 0000
4 MR 0000 cb
4 MC 0001
8 MR 0001 41
9e10 1b43 954e 7be9 0000 0000 0000 0000 0000 0000 0000 0002
00 02 0 0 0 0 8
cb93 RES 2,E
0 MC 0000
4 MR 0000 cb
4 MC 0001
8 MR 0001 93
c200 4e05 b3f8 2234 0000 0000 0000 0000 0000 0000 0000 0002
00 02 0 0 0 0 8
cbe5 SET 4,L
0 MC 0000
4 MR 0000 cb
4 MC 0001
8 MR 0001 e5
ca00 df0d d588 b49f 0000 0000 0000 0000 0000 0000 0000 0002
00 02 0 0 0 0 8
8c ADC A,H
0 MC 0000
4 MR 0000 8c
d191 0f3b 200d dca6 0000 0000 0000 0000 0000 0000 0000 0001
00 01 0 0 0 0 4
92 SUB D
0 MC 0000
4 MR 0000 92
d582 0f3b 200d dca6 0000 0000 0000 0000 0000 0000 0000 0001
00 01 0 0 0 0 4
9d SBC A,L
0 MC 0000
4 MR 0000 9d
4f1a 0f3b 200d dca6 0000 0000 0000 0000 0000 0000 0000 0001
00 01 0 0 0 0 4
a3 AND E
0 MC 0000
4 MR 0000 a3
0514 0f3b 200d dca6 0000 0000 0000 0000 0000 0000 0000 0001
00 01 0 0 0 0 4
ae XOR (HL)
0 MC 0000
4 MR 0000 ae
4 MC dca6
7 MR dca6 49
bca8 0f3b 200d dca6 0000 0000 0000 0000 0000 0000 0000 0001
00 01 0 0 0 0 7
b4 OR H
0 MC 0000
4 MR 0000 b4
fda8 0f3b 200d dca6 0000 0000 0000 0000 0000 0000 0000 0001
00 01 0 0 0 0 4
bf CP A
0 MC 0000
4 MR 0000 bf
f562 0f3b 200d dca6 0000 0000 0000 0000 0000 0000 0000 0001
00 01 0 0 0 0 4
43 LD B,E
0 MC 0000
4 MR 0000 43
0200 d898 90d8 a169 0000 0000 0000 0000 0000 0000 0000 0001
00 01 0 0 0 0 4
6e LD L,(HL)
0 MC 0000
4 MR 0000 6e
4 MC a169
7 MR a169 50
0200 cf98 90d8 a150 0000 0000 0000 0000 0000 0000 0000 0001
00 01 0 0 0 0 7
e3 EX (SP),HL
0 MC 0000
4 MR 0000 e3
4 MC 0373
7 MR 0373 8e
7 MC 0374
10 MR 0374 e1
10 MC 0374
11 MC 0374
14 MW 0374 4d
14 MC 0373
17 MW 0373 22
17 MC 0373
18 MC 0373
0000 0000 0000 e18e 0000 0000 0000 0000 0000 0000 0373 0001
00 01 0 0 0 0 19
0373 22 4d -1
03 INC BC
0 MC 0000
4 MR 0000 03
4 MC 0001
5 MC 0001
0000 789b 0000 0000 0000 0000 0000 0000 0000 0000 0000 0001
00 01 0 0 0 0 6
3b DEC SP
0 MC 0000
4 MR 0000 3b
4 MC 0001
5 MC 0001
0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 9d35 0001
00 01 0 0 0 0 6
07 RLCA
0 MC 0000
4 MR 0000 07
1101 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0001
00 01 0 0 0 0 4
1f RRA
0 MC 0000
4 MR 0000 1f
00c5 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0001
00 01 0 0 0 0 4
cb09 RRC C
0 MC 0000
4 MR 0000 cb
4 MC 0001
8 MR 0001 09
182c 122e dd97 59c6 0000 0000 0000 0000 0000 0000 0000 0002
00 02 0 0 0 0 8
cb11 RL C
0 MC 0000
4 MR 0000 cb
4 MC 0001
8 MR 0001 11
65ac e2b8 4b8a ed42 0000 0000 0000 0000 0000 0000 0000 0002
00 02 0 0 0 0 8
cb36 SLL (HL)*
0 MC 0000
4 MR 0000 cb
4 MC 0001
8 MR 0001 36
8 MC 6d38
11 MR 6d38 f1
11 MC 6d38
12 MC 6d38
15 MW 6d38 e3
8aa1 1185 1dde 6d38 0000 0000 0000 0000 0000 0000 0000 0002
00 02 0 0 0 0 15
6d38 e3 -1
cb52 BIT 2,D
0 MC 0000
4 MR 0000 cb
4 MC 0001
8 MR 0001 52
8b74 ff7a b0ff ac44 0000 0000 0000 0000 0000 0000 0000 0002
00 02 0 0 0 0 8
cb93 RES 2,E
0 MC 0000
4 MR 0000 cb
4 MC 0001
8 MR 0001 93
c200 4e05 b3f8 2234 0000 0000 0000 0000 0000 0000 0000 0002
00 02 0 0 0 0 8
cbc4 SET 0,H
0 MC 0000
4 MR 0000 cb
4 MC 0001
8 MR 0001 c4
7e00 545a 6ecf 5976 0000 0000 0000 0000 0000 0000 0000 0002
00 02 0 0 0 0 8
dd75 LD (IX+d),L
0 MC 0000
4 MR 0000 dd
4 MC 0001
8 MR 0001 75
8 MC 0002
11 MR 0002 30
11 MC 0002
12 MC 0002
13 MC 0002
14 MC 0002
15 MC 0002
16 MC ae7c
19 MW ae7c 4f
5772 e833 b63e 734f 0000 0000 0000 0000 ae4c e8c2 0000 0003
00 02 0 0 0 0 19
ae7c 4f -1
dd4e LD C,(IX+d)
0 MC 0000
4 MR 0000 dd
4 MC 0001
8 MR 0001 4e
8 MC 0002
11 MR 0002 2e
11 MC 0002
12 MC 0002
13 MC 0002
14 MC 0002
15 MC 0002
16 MC d979
19 MR d979 76
7bf7 6676 8d55 def2 0000 0000 0000 0000 d94b 17fb 0000 0003
00 02 0 0 0 0 19
+197
View File
@@ -0,0 +1,197 @@
00 NOP
0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 00 -1
-1
ed67 RRD
3624 b16a a4db b9de 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 ed 67 -1
b9de 93 -1
-1
ed6f RLD
658b 7a7a ecf0 403c 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 ed 6f -1
403c c4 -1
-1
81 ADD A,C
f500 0f3b 200d dca6 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 81 -1
dca6 49 -1
-1
cb41 BIT 0,C
9e00 1b43 954e 7be9 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 cb 41 -1
7be9 f7 -1
-1
cb93 RES 2,E
c200 4e05 b3f8 2234 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 cb 93 -1
2234 a0 -1
-1
cbe5 SET 4,L
ca00 df0d d588 b48f 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 cb e5 -1
b48f cf -1
-1
8c ADC A,H
f500 0f3b 200d dca6 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 8c -1
dca6 49 -1
-1
92 SUB D
f500 0f3b 200d dca6 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 92 -1
dca6 49 -1
-1
9d SBC A,L
f500 0f3b 200d dca6 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 9d -1
dca6 49 -1
-1
a3 AND E
f500 0f3b 200d dca6 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 a3 -1
dca6 49 -1
-1
ae XOR (HL)
f500 0f3b 200d dca6 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 ae -1
dca6 49 -1
-1
b4 OR H
f500 0f3b 200d dca6 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 b4 -1
dca6 49 -1
-1
bf CP A
f500 0f3b 200d dca6 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 bf -1
dca6 49 -1
-1
43 LD B,E
0200 cf98 90d8 a169 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 43 -1
a169 50 -1
-1
6e LD L,(HL)
0200 cf98 90d8 a169 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 6e -1
a169 50 -1
-1
e3 EX (SP),HL
0000 0000 0000 4d22 0000 0000 0000 0000 0000 0000 0373 0000
00 00 0 0 0 0 1
0000 e3 -1
0373 8e e1 -1
-1
03 INC BC
0000 789a 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 03 -1
-1
3b DEC SP
0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 9d36 0000
00 00 0 0 0 0 1
0000 3b -1
-1
07 RLCA
8800 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 07 -1
-1
1f RRA
01c4 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 1f -1
-1
cb09 RRC C
1800 125c dd97 59c6 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 cb 09 -1
59c6 9e -1
-1
cb11 RL C
6500 e25c 4b8a ed42 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 cb 11 -1
ed42 b7 -1
-1
cb36 SLL (HL)*
8a00 1185 1dde 6d38 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 cb 36 -1
6d38 f1 -1
-1
cb52 BIT 2,D
8b00 ff7a b0ff ac44 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 cb 52 -1
ac44 00 -1
-1
cb93 RES 2,E
c200 4e05 b3f8 2234 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 cb 93 -1
2234 a0 -1
-1
cbc4 SET 0,H
7e00 545a 6ecf 5876 0000 0000 0000 0000 0000 0000 0000 0000
00 00 0 0 0 0 1
0000 cb c4 -1
5876 9d -1
-1
dd75 LD (IX+d),L
5772 e833 b63e 734f 0000 0000 0000 0000 ae4c e8c2 0000 0000
00 00 0 0 0 0 1
0000 dd 75 30 -1
-1
dd4e LD C,(IX+d)
7bf7 6605 8d55 def2 0000 0000 0000 0000 d94b 17fb 0000 0000
00 00 0 0 0 0 1
0000 dd 4e 2e -1
d979 76 -1
-1
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff