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de0-zx-spectrum/db/spectrum.lpc.html
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Initial import. Counter to leds
2022-03-30 11:53:01 +03:00
<TABLE>
<TR bgcolor="#C0C0C0">
<TH>Hierarchy</TH>
<TH>Input</TH>
<TH>Constant Input</TH>
<TH>Unused Input</TH>
<TH>Floating Input</TH>
<TH>Output</TH>
<TH>Constant Output</TH>
<TH>Unused Output</TH>
<TH>Floating Output</TH>
<TH>Bidir</TH>
<TH>Constant Bidir</TH>
<TH>Unused Bidir</TH>
<TH>Input only Bidir</TH>
<TH>Output only Bidir</TH>
</TR>
Added ROM based LED patterns
2022-03-30 12:47:42 +03:00
<TR >
Fixed video, kbd and buzzer
2022-03-31 14:13:34 +03:00
<TD >z80_|control_pins_</TD>
<TD >15</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >14</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|data_pins_</TD>
<TD >5</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >16</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|address_pins_</TD>
<TD >19</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >16</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|sw1_</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >16</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|sw2_</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >16</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|bus_switch_</TD>
<TD >5</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >5</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|bus_control_</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|address_latch_|b2v_mux</TD>
<TD >33</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >16</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|address_latch_|b2v_inst_inc_dec|b2v_dual_adder_9</TD>
<TD >5</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|address_latch_|b2v_inst_inc_dec|b2v_dual_adder_7</TD>
<TD >5</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|address_latch_|b2v_inst_inc_dec|b2v_dual_adder_4</TD>
<TD >5</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|address_latch_|b2v_inst_inc_dec|b2v_dual_adder_2</TD>
<TD >5</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|address_latch_|b2v_inst_inc_dec|b2v_dual_adder_10</TD>
<TD >5</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|address_latch_|b2v_inst_inc_dec|b2v_dual_adder_0</TD>
<TD >5</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|address_latch_|b2v_inst_inc_dec</TD>
<TD >19</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >16</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|address_latch_|b2v_inst7</TD>
<TD >33</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >16</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|address_latch_</TD>
<TD >10</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >17</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >16</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_control_</TD>
<TD >24</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >23</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_wz_lo</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_wz_hi</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_sp_lo</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_sp_hi</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_pc_lo</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_pc_hi</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_iy_lo</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_iy_hi</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_ix_lo</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_ix_hi</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_ir_lo</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_ir_hi</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_hl_lo</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_hl_hi</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_hl2_lo</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_hl2_hi</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_de_lo</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_de_hi</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_de2_lo</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_de2_hi</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_bc_lo</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_bc_hi</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_bc2_lo</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_bc2_hi</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_af_lo</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_af_hi</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_af2_lo</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_|b2v_latch_af2_hi</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|reg_file_</TD>
<TD >29</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >32</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|alu_|b2v_prep_daa</TD>
<TD >8</TD>
<TD >0</TD>
<TD >1</TD>
<TD >0</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|alu_|b2v_op2_latch_mux_low</TD>
<TD >11</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >5</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|alu_|b2v_op2_latch_mux_high</TD>
<TD >11</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >5</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|alu_|b2v_op1_latch_mux_low</TD>
<TD >11</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >5</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|alu_|b2v_op1_latch_mux_high</TD>
<TD >6</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >5</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|alu_|b2v_input_shift</TD>
<TD >11</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >10</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|alu_|b2v_input_bit_select</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|alu_|b2v_core|b2v_alu_slice_bit_3</TD>
<TD >6</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|alu_|b2v_core|b2v_alu_slice_bit_2</TD>
<TD >6</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|alu_|b2v_core|b2v_alu_slice_bit_1</TD>
<TD >6</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|alu_|b2v_core|b2v_alu_slice_bit_0</TD>
<TD >6</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|alu_|b2v_core</TD>
<TD >12</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >6</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|alu_</TD>
<TD >27</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >20</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|alu_flags_|b2v_inst_mux_cf2</TD>
<TD >6</TD>
<TD >1</TD>
<TD >0</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|alu_flags_|b2v_inst_mux_cf</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|alu_flags_</TD>
<TD >30</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|alu_select_</TD>
<TD >17</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >17</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|alu_control_|b2v_inst_shift_mux</TD>
<TD >11</TD>
<TD >1</TD>
<TD >0</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|alu_control_|b2v_inst_pf_sel</TD>
<TD >6</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|alu_control_|b2v_inst_cond_mux</TD>
<TD >6</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|alu_control_</TD>
<TD >29</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >18</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|sequencer_</TD>
<TD >7</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >12</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|memory_ifc_</TD>
<TD >13</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|resets_</TD>
<TD >6</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|pla_decode_</TD>
<TD >15</TD>
<TD >19</TD>
<TD >1</TD>
<TD >19</TD>
<TD >105</TD>
<TD >19</TD>
<TD >19</TD>
<TD >19</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|pin_control_</TD>
<TD >9</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|ir_</TD>
<TD >12</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|interrupts_</TD>
<TD >12</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >5</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|execute_</TD>
<TD >128</TD>
<TD >0</TD>
<TD >19</TD>
<TD >0</TD>
<TD >111</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|decode_state_</TD>
<TD >15</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_|clk_delay_</TD>
<TD >9</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >7</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >z80_</TD>
<TD >6</TD>
<TD >2</TD>
<TD >0</TD>
<TD >2</TD>
<TD >24</TD>
<TD >2</TD>
<TD >2</TD>
<TD >2</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >ula_|zx_keyboard_</TD>
<TD >28</TD>
<TD >0</TD>
<TD >9</TD>
<TD >0</TD>
<TD >6</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >ula_|ps2_keyboard_</TD>
<TD >4</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >10</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >ula_|video_</TD>
<TD >12</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >28</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >ula_|i2s_intf_</TD>
<TD >35</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >36</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >ula_|i2c_loader_</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >ula_|clocks_</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >ula_|pll_|altpll_component|auto_generated</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >6</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >ula_|pll_</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >4</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >ula_</TD>
Working version with loader from schmidt trigger
2022-04-01 18:58:14 +03:00
<TD >40</TD>
Fixed video, kbd and buzzer
2022-03-31 14:13:34 +03:00
<TD >2</TD>
<TD >3</TD>
<TD >2</TD>
<TD >47</TD>
<TD >2</TD>
<TD >2</TD>
<TD >2</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
WIP: sdram support
2022-04-02 14:56:02 +03:00
<TD >sdram_|sdram_clk_pll|altpll_component|auto_generated</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >5</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >sdram_|sdram_clk_pll</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >sdram_</TD>
<TD >59</TD>
<TD >33</TD>
<TD >1</TD>
<TD >33</TD>
<TD >56</TD>
<TD >33</TD>
<TD >33</TD>
<TD >33</TD>
<TD >16</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
Sample memory model with all components
2022-03-30 14:57:41 +03:00
<TD >ram1|altsyncram_component|auto_generated|mux2</TD>
<TD >34</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >ram1|altsyncram_component|auto_generated|rden_decode</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >4</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >ram1|altsyncram_component|auto_generated|decode3</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >4</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >ram1|altsyncram_component|auto_generated</TD>
<TD >25</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >ram1</TD>
<TD >25</TD>
<TD >0</TD>
Fixed video, kbd and buzzer
2022-03-31 14:13:34 +03:00
<TD >0</TD>
<TD >0</TD>
Sample memory model with all components
2022-03-30 14:57:41 +03:00
<TD >8</TD>
Fixed video, kbd and buzzer
2022-03-31 14:13:34 +03:00
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
Sample memory model with all components
2022-03-30 14:57:41 +03:00
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
Added RAM16
2022-03-30 14:23:28 +03:00
<TD >ram0|altsyncram_component|auto_generated|mux5</TD>
<TD >17</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >ram0|altsyncram_component|auto_generated|mux4</TD>
<TD >17</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >ram0|altsyncram_component|auto_generated|rden_decode_b</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >ram0|altsyncram_component|auto_generated|rden_decode_a</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >ram0|altsyncram_component|auto_generated|decode3</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >ram0|altsyncram_component|auto_generated|decode2</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >ram0|altsyncram_component|auto_generated</TD>
<TD >47</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >16</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >ram0</TD>
<TD >47</TD>
Sample memory model with all components
2022-03-30 14:57:41 +03:00
<TD >10</TD>
Added RAM16
2022-03-30 14:23:28 +03:00
<TD >0</TD>
Sample memory model with all components
2022-03-30 14:57:41 +03:00
<TD >10</TD>
Added RAM16
2022-03-30 14:23:28 +03:00
<TD >16</TD>
Sample memory model with all components
2022-03-30 14:57:41 +03:00
<TD >10</TD>
<TD >10</TD>
<TD >10</TD>
Added RAM16
2022-03-30 14:23:28 +03:00
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
ROM0 now has the spectrum rom
2022-03-30 13:18:06 +03:00
<TD >rom|altsyncram_component|auto_generated|mux2</TD>
<TD >17</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >rom|altsyncram_component|auto_generated|rden_decode</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >2</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
Added ROM based LED patterns
2022-03-30 12:47:42 +03:00
<TD >rom|altsyncram_component|auto_generated</TD>
ROM0 now has the spectrum rom
2022-03-30 13:18:06 +03:00
<TD >15</TD>
Added ROM based LED patterns
2022-03-30 12:47:42 +03:00
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >rom</TD>
ROM0 now has the spectrum rom
2022-03-30 13:18:06 +03:00
<TD >15</TD>
Added ROM based LED patterns
2022-03-30 12:47:42 +03:00
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
Initial import. Counter to leds
2022-03-30 11:53:01 +03:00
</TABLE>
Reference in New Issue Copy Permalink